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diff for duplicates of <56C51938.1060806@rock-chips.com>

diff --git a/a/1.txt b/N1/1.txt
index a3158da..c50adf4 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,8 +1,8 @@
 Hi Mark
 
-在 17/02/2016 19:46, Mark Rutland 写道:
+? 17/02/2016 19:46, Mark Rutland ??:
 > On Wed, Feb 17, 2016 at 10:01:16AM +0800, jianqun.xu wrote:
->> From: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
+>> From: Xu Jianqun <jay.xu@rock-chips.com>
 >>
 >> Add dtsi file for Rockchip rk3399 SoCs, which includes some
 >> general nodes such as cpu, pmu, cru, gic, amba and so on.
@@ -14,7 +14,7 @@ Hi Mark
 ok, next version will remove them. thanks
 
 >
->> Signed-off-by: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
+>> Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
 >> ---
 >>   arch/arm64/boot/dts/rockchip/rk3399.dtsi | 989 +++++++++++++++++++++++++++++++
 >>   1 file changed, 989 insertions(+)
@@ -101,7 +101,7 @@ Yes, but only the simple system now, more function IDs will be added later.
 > Which PSCI version have you implemented? Are you using a standard
 > firmware (e.g. ARM Trusted Firmware), or some custom implementation?
 >
->> +		cpu_l0: cpu@0 {
+>> +		cpu_l0: cpu at 0 {
 >> +			device_type = "cpu";
 >> +			compatible = "arm,cortex-a53", "arm,armv8";
 >> +			reg = <0x0 0x0>;
@@ -109,7 +109,7 @@ Yes, but only the simple system now, more function IDs will be added later.
 >> +			enable-method = "psci";
 >> +		};
 >
->> +		cpu_b0: cpu@100 {
+>> +		cpu_b0: cpu at 100 {
 >> +			device_type = "cpu";
 >> +			compatible = "arm,cortex-a72", "arm,armv8";
 >> +			reg = <0x0 0x100>;
@@ -163,8 +163,3 @@ ok, I will fix it. thanks
 >
 >
 >
-
---
-To unsubscribe from this list: send the line "unsubscribe devicetree" in
-the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index 6d18ab4..2abef53 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,34 +1,17 @@
  "ref\01455673992-16469-1-git-send-email-jay.xu@rock-chips.com\0"
  "ref\01455674476-16655-1-git-send-email-jay.xu@rock-chips.com\0"
  "ref\020160217114645.GA32647@leverpostej\0"
- "From\0Jianqun Xu <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\0"
- "Subject\0Re: [PATCH 6/6] ARM64: dts: rockchip: add core dtsi file for rk3399\0"
+ "From\0jay.xu@rock-chips.com (Jianqun Xu)\0"
+ "Subject\0[PATCH 6/6] ARM64: dts: rockchip: add core dtsi file for rk3399\0"
  "Date\0Thu, 18 Feb 2016 09:07:04 +0800\0"
- "To\0Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>\0"
- "Cc\0heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org"
-  robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
-  pawel.moll-5wv7dgnIgG8@public.gmane.org
-  ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org
-  galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
-  jwerner-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org
-  broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
-  catalin.marinas-5wv7dgnIgG8@public.gmane.org
-  will.deacon-5wv7dgnIgG8@public.gmane.org
-  sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
-  linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
-  sjoerd.simons-ZGY8ohtN/8pPYcu2f3hruQ@public.gmane.org
-  huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org
-  linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
- " devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "Hi Mark\n"
  "\n"
- "\345\234\250 17/02/2016 19:46, Mark Rutland \345\206\231\351\201\223:\n"
+ "? 17/02/2016 19:46, Mark Rutland ??:\n"
  "> On Wed, Feb 17, 2016 at 10:01:16AM +0800, jianqun.xu wrote:\n"
- ">> From: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n"
+ ">> From: Xu Jianqun <jay.xu@rock-chips.com>\n"
  ">>\n"
  ">> Add dtsi file for Rockchip rk3399 SoCs, which includes some\n"
  ">> general nodes such as cpu, pmu, cru, gic, amba and so on.\n"
@@ -40,7 +23,7 @@
  "ok, next version will remove them. thanks\n"
  "\n"
  ">\n"
- ">> Signed-off-by: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n"
+ ">> Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>\n"
  ">> ---\n"
  ">>   arch/arm64/boot/dts/rockchip/rk3399.dtsi | 989 +++++++++++++++++++++++++++++++\n"
  ">>   1 file changed, 989 insertions(+)\n"
@@ -127,7 +110,7 @@
  "> Which PSCI version have you implemented? Are you using a standard\n"
  "> firmware (e.g. ARM Trusted Firmware), or some custom implementation?\n"
  ">\n"
- ">> +\t\tcpu_l0: cpu@0 {\n"
+ ">> +\t\tcpu_l0: cpu at 0 {\n"
  ">> +\t\t\tdevice_type = \"cpu\";\n"
  ">> +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n"
  ">> +\t\t\treg = <0x0 0x0>;\n"
@@ -135,7 +118,7 @@
  ">> +\t\t\tenable-method = \"psci\";\n"
  ">> +\t\t};\n"
  ">\n"
- ">> +\t\tcpu_b0: cpu@100 {\n"
+ ">> +\t\tcpu_b0: cpu at 100 {\n"
  ">> +\t\t\tdevice_type = \"cpu\";\n"
  ">> +\t\t\tcompatible = \"arm,cortex-a72\", \"arm,armv8\";\n"
  ">> +\t\t\treg = <0x0 0x100>;\n"
@@ -188,11 +171,6 @@
  "> Mark.\n"
  ">\n"
  ">\n"
- ">\n"
- "\n"
- "--\n"
- "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
- "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
- More majordomo info at  http://vger.kernel.org/majordomo-info.html
+ >
 
-b6cd423218ed3eababea81295caa8776eee260ed4fec387d6450548ee1bd01f5
+7545197df18740a463ba7d6512722612ff325af06c94fe1e80ee5febc0ff288b

diff --git a/a/1.txt b/N2/1.txt
index a3158da..9c308ed 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -2,7 +2,7 @@ Hi Mark
 
 在 17/02/2016 19:46, Mark Rutland 写道:
 > On Wed, Feb 17, 2016 at 10:01:16AM +0800, jianqun.xu wrote:
->> From: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
+>> From: Xu Jianqun <jay.xu@rock-chips.com>
 >>
 >> Add dtsi file for Rockchip rk3399 SoCs, which includes some
 >> general nodes such as cpu, pmu, cru, gic, amba and so on.
@@ -14,7 +14,7 @@ Hi Mark
 ok, next version will remove them. thanks
 
 >
->> Signed-off-by: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
+>> Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
 >> ---
 >>   arch/arm64/boot/dts/rockchip/rk3399.dtsi | 989 +++++++++++++++++++++++++++++++
 >>   1 file changed, 989 insertions(+)
@@ -163,8 +163,3 @@ ok, I will fix it. thanks
 >
 >
 >
-
---
-To unsubscribe from this list: send the line "unsubscribe devicetree" in
-the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N2/content_digest
index 6d18ab4..bb0d46f 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,34 +1,34 @@
  "ref\01455673992-16469-1-git-send-email-jay.xu@rock-chips.com\0"
  "ref\01455674476-16655-1-git-send-email-jay.xu@rock-chips.com\0"
  "ref\020160217114645.GA32647@leverpostej\0"
- "From\0Jianqun Xu <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\0"
+ "From\0Jianqun Xu <jay.xu@rock-chips.com>\0"
  "Subject\0Re: [PATCH 6/6] ARM64: dts: rockchip: add core dtsi file for rk3399\0"
  "Date\0Thu, 18 Feb 2016 09:07:04 +0800\0"
- "To\0Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>\0"
- "Cc\0heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org"
-  robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
-  pawel.moll-5wv7dgnIgG8@public.gmane.org
-  ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org
-  galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
-  jwerner-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org
-  broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
-  catalin.marinas-5wv7dgnIgG8@public.gmane.org
-  will.deacon-5wv7dgnIgG8@public.gmane.org
-  sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
-  linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
-  sjoerd.simons-ZGY8ohtN/8pPYcu2f3hruQ@public.gmane.org
-  huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org
-  linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
- " devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0"
+ "To\0Mark Rutland <mark.rutland@arm.com>\0"
+ "Cc\0heiko@sntech.de"
+  robh+dt@kernel.org
+  pawel.moll@arm.com
+  ijc+devicetree@hellion.org.uk
+  galak@codeaurora.org
+  jwerner@chromium.org
+  broonie@kernel.org
+  catalin.marinas@arm.com
+  will.deacon@arm.com
+  sboyd@codeaurora.org
+  linus.walleij@linaro.org
+  sjoerd.simons@collabora.co.uk
+  huangtao@rock-chips.com
+  linux-rockchip@lists.infradead.org
+  linux-kernel@vger.kernel.org
+  linux-arm-kernel@lists.infradead.org
+ " devicetree@vger.kernel.org\0"
  "\00:1\0"
  "b\0"
  "Hi Mark\n"
  "\n"
  "\345\234\250 17/02/2016 19:46, Mark Rutland \345\206\231\351\201\223:\n"
  "> On Wed, Feb 17, 2016 at 10:01:16AM +0800, jianqun.xu wrote:\n"
- ">> From: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n"
+ ">> From: Xu Jianqun <jay.xu@rock-chips.com>\n"
  ">>\n"
  ">> Add dtsi file for Rockchip rk3399 SoCs, which includes some\n"
  ">> general nodes such as cpu, pmu, cru, gic, amba and so on.\n"
@@ -40,7 +40,7 @@
  "ok, next version will remove them. thanks\n"
  "\n"
  ">\n"
- ">> Signed-off-by: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n"
+ ">> Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>\n"
  ">> ---\n"
  ">>   arch/arm64/boot/dts/rockchip/rk3399.dtsi | 989 +++++++++++++++++++++++++++++++\n"
  ">>   1 file changed, 989 insertions(+)\n"
@@ -188,11 +188,6 @@
  "> Mark.\n"
  ">\n"
  ">\n"
- ">\n"
- "\n"
- "--\n"
- "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
- "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
- More majordomo info at  http://vger.kernel.org/majordomo-info.html
+ >
 
-b6cd423218ed3eababea81295caa8776eee260ed4fec387d6450548ee1bd01f5
+4b7c7928b9feab176ce9d447290c911409e6de34f110dcaec1f22e2456c1be1e

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