diff for duplicates of <56C521C9.4050906@rock-chips.com> diff --git a/a/1.txt b/N1/1.txt index ca67719..b643666 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,10 +1,10 @@ -在 17/02/2016 15:00, Heiko Stuebner 写道: +? 17/02/2016 15:00, Heiko Stuebner ??: > Hi Jianqun, > > Am Mittwoch, 17. Februar 2016, 10:01:16 schrieb jianqun.xu: ->> From: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> +>> From: Xu Jianqun <jay.xu@rock-chips.com> >> >> Add dtsi file for Rockchip rk3399 SoCs, which includes some >> general nodes such as cpu, pmu, cru, gic, amba and so on. @@ -14,7 +14,7 @@ > please remove any review-cruft like Change-Ids from mainline patches :-) ok, will fix it in next version patch > ->> Signed-off-by: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> +>> Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com> >> --- >> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 989 >> +++++++++++++++++++++++++++++++ 1 file changed, 989 insertions(+) @@ -137,7 +137,7 @@ the idle node will be added by my colleague with new patch later, so I will remove it first in next version patch. > >> + ->> + cpu_l0: cpu@0 { +>> + cpu_l0: cpu at 0 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a53", "arm,armv8"; >> + reg = <0x0 0x0>; @@ -149,7 +149,7 @@ so I will remove it first in next version patch. >> + enable-method = "psci"; >> + }; >> + ->> + cpu_l1: cpu@1 { +>> + cpu_l1: cpu at 1 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a53", "arm,armv8"; >> + reg = <0x0 0x1>; @@ -157,7 +157,7 @@ so I will remove it first in next version patch. >> + enable-method = "psci"; >> + }; >> + ->> + cpu_l2: cpu@2 { +>> + cpu_l2: cpu at 2 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a53", "arm,armv8"; >> + reg = <0x0 0x2>; @@ -165,7 +165,7 @@ so I will remove it first in next version patch. >> + enable-method = "psci"; >> + }; >> + ->> + cpu_l3: cpu@3 { +>> + cpu_l3: cpu at 3 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a53", "arm,armv8"; >> + reg = <0x0 0x3>; @@ -173,7 +173,7 @@ so I will remove it first in next version patch. >> + enable-method = "psci"; >> + }; >> + ->> + cpu_b0: cpu@100 { +>> + cpu_b0: cpu at 100 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a72", "arm,armv8"; >> + reg = <0x0 0x100>; @@ -181,7 +181,7 @@ so I will remove it first in next version patch. >> + enable-method = "psci"; >> + }; >> + ->> + cpu_b1: cpu@101 { +>> + cpu_b1: cpu at 101 { >> + device_type = "cpu"; >> + compatible = "arm,cortex-a72", "arm,armv8"; >> + reg = <0x0 0x101>; @@ -223,7 +223,7 @@ ok, will fix it in next version patch >> + clock-output-names = "xin24m"; >> + }; >> + ->> + gic: interrupt-controller@fee00000 { +>> + gic: interrupt-controller at fee00000 { >> + compatible = "arm,gic-v3"; >> + #interrupt-cells = <3>; >> + #address-cells = <2>; @@ -243,7 +243,7 @@ ok, will fix it in next version patch > again GIC_CPU_MASK_SIMPLE(6)? ok. > ->> + its: interrupt-controller@fee20000 { +>> + its: interrupt-controller at fee20000 { >> + compatible = "arm,gic-v3-its"; >> + msi-controller; >> + reg = <0x0 0xfee20000 0x0 0x20000>; @@ -256,7 +256,7 @@ ok. >> + #size-cells = <2>; >> + ranges; >> + ->> + dmac_bus: dma-controller@ff6d0000 { +>> + dmac_bus: dma-controller at ff6d0000 { >> + compatible = "arm,pl330", "arm,primecell"; >> + reg = <0x0 0xff6d0000 0x0 0x4000>; >> + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, @@ -278,8 +278,3 @@ Since amba node is added by my colleague, I will double check it, thanks > > > - --- -To unsubscribe from this list: send the line "unsubscribe devicetree" in -the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index 52009a4..37fd82c 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,36 +1,19 @@ "ref\01455673992-16469-1-git-send-email-jay.xu@rock-chips.com\0" "ref\01455674476-16655-1-git-send-email-jay.xu@rock-chips.com\0" "ref\02396201.CBcovI4jc4@phil\0" - "From\0Jianqun Xu <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\0" - "Subject\0Re: [PATCH 6/6] ARM64: dts: rockchip: add core dtsi file for rk3399\0" + "From\0jay.xu@rock-chips.com (Jianqun Xu)\0" + "Subject\0[PATCH 6/6] ARM64: dts: rockchip: add core dtsi file for rk3399\0" "Date\0Thu, 18 Feb 2016 09:43:37 +0800\0" - "To\0Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\0" - "Cc\0robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org" - pawel.moll-5wv7dgnIgG8@public.gmane.org - mark.rutland-5wv7dgnIgG8@public.gmane.org - ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org - galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org - jwerner-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org - broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org - catalin.marinas-5wv7dgnIgG8@public.gmane.org - will.deacon-5wv7dgnIgG8@public.gmane.org - sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org - linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org - sjoerd.simons-ZGY8ohtN/8pPYcu2f3hruQ@public.gmane.org - huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org - linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - " devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "\n" "\n" - "\345\234\250 17/02/2016 15:00, Heiko Stuebner \345\206\231\351\201\223:\n" + "? 17/02/2016 15:00, Heiko Stuebner ??:\n" "> Hi Jianqun,\n" ">\n" "> Am Mittwoch, 17. Februar 2016, 10:01:16 schrieb jianqun.xu:\n" - ">> From: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n" + ">> From: Xu Jianqun <jay.xu@rock-chips.com>\n" ">>\n" ">> Add dtsi file for Rockchip rk3399 SoCs, which includes some\n" ">> general nodes such as cpu, pmu, cru, gic, amba and so on.\n" @@ -40,7 +23,7 @@ "> please remove any review-cruft like Change-Ids from mainline patches :-)\n" "ok, will fix it in next version patch\n" ">\n" - ">> Signed-off-by: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n" + ">> Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>\n" ">> ---\n" ">> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 989\n" ">> +++++++++++++++++++++++++++++++ 1 file changed, 989 insertions(+)\n" @@ -163,7 +146,7 @@ "so I will remove it first in next version patch.\n" ">\n" ">> +\n" - ">> +\t\tcpu_l0: cpu@0 {\n" + ">> +\t\tcpu_l0: cpu at 0 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" ">> +\t\t\treg = <0x0 0x0>;\n" @@ -175,7 +158,7 @@ ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu_l1: cpu@1 {\n" + ">> +\t\tcpu_l1: cpu at 1 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" ">> +\t\t\treg = <0x0 0x1>;\n" @@ -183,7 +166,7 @@ ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu_l2: cpu@2 {\n" + ">> +\t\tcpu_l2: cpu at 2 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" ">> +\t\t\treg = <0x0 0x2>;\n" @@ -191,7 +174,7 @@ ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu_l3: cpu@3 {\n" + ">> +\t\tcpu_l3: cpu at 3 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" ">> +\t\t\treg = <0x0 0x3>;\n" @@ -199,7 +182,7 @@ ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu_b0: cpu@100 {\n" + ">> +\t\tcpu_b0: cpu at 100 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,cortex-a72\", \"arm,armv8\";\n" ">> +\t\t\treg = <0x0 0x100>;\n" @@ -207,7 +190,7 @@ ">> +\t\t\tenable-method = \"psci\";\n" ">> +\t\t};\n" ">> +\n" - ">> +\t\tcpu_b1: cpu@101 {\n" + ">> +\t\tcpu_b1: cpu at 101 {\n" ">> +\t\t\tdevice_type = \"cpu\";\n" ">> +\t\t\tcompatible = \"arm,cortex-a72\", \"arm,armv8\";\n" ">> +\t\t\treg = <0x0 0x101>;\n" @@ -249,7 +232,7 @@ ">> +\t\tclock-output-names = \"xin24m\";\n" ">> +\t};\n" ">> +\n" - ">> +\tgic: interrupt-controller@fee00000 {\n" + ">> +\tgic: interrupt-controller at fee00000 {\n" ">> +\t\tcompatible = \"arm,gic-v3\";\n" ">> +\t\t#interrupt-cells = <3>;\n" ">> +\t\t#address-cells = <2>;\n" @@ -269,7 +252,7 @@ "> again GIC_CPU_MASK_SIMPLE(6)?\n" "ok.\n" ">\n" - ">> +\t\tits: interrupt-controller@fee20000 {\n" + ">> +\t\tits: interrupt-controller at fee20000 {\n" ">> +\t\t\tcompatible = \"arm,gic-v3-its\";\n" ">> +\t\t\tmsi-controller;\n" ">> +\t\t\treg = <0x0 0xfee20000 0x0 0x20000>;\n" @@ -282,7 +265,7 @@ ">> +\t\t#size-cells = <2>;\n" ">> +\t\tranges;\n" ">> +\n" - ">> +\t\tdmac_bus: dma-controller@ff6d0000 {\n" + ">> +\t\tdmac_bus: dma-controller at ff6d0000 {\n" ">> +\t\t\tcompatible = \"arm,pl330\", \"arm,primecell\";\n" ">> +\t\t\treg = <0x0 0xff6d0000 0x0 0x4000>;\n" ">> +\t\t\tinterrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -303,11 +286,6 @@ "> Heiko\n" ">\n" ">\n" - ">\n" - "\n" - "--\n" - "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" - "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" - More majordomo info at http://vger.kernel.org/majordomo-info.html + > -2b4739ba319d248bc99537995ec02ebcb887aa2948fa8cf32140a923a1253635 +e2f91cd48ed31a1e69d041f7a6de80e628332658f6ec41b8372ef3954e1f648b
diff --git a/a/1.txt b/N2/1.txt index ca67719..e5c3f93 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -4,7 +4,7 @@ > Hi Jianqun, > > Am Mittwoch, 17. Februar 2016, 10:01:16 schrieb jianqun.xu: ->> From: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> +>> From: Xu Jianqun <jay.xu@rock-chips.com> >> >> Add dtsi file for Rockchip rk3399 SoCs, which includes some >> general nodes such as cpu, pmu, cru, gic, amba and so on. @@ -14,7 +14,7 @@ > please remove any review-cruft like Change-Ids from mainline patches :-) ok, will fix it in next version patch > ->> Signed-off-by: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> +>> Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com> >> --- >> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 989 >> +++++++++++++++++++++++++++++++ 1 file changed, 989 insertions(+) @@ -278,8 +278,3 @@ Since amba node is added by my colleague, I will double check it, thanks > > > - --- -To unsubscribe from this list: send the line "unsubscribe devicetree" in -the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N2/content_digest index 52009a4..4512993 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,27 +1,27 @@ "ref\01455673992-16469-1-git-send-email-jay.xu@rock-chips.com\0" "ref\01455674476-16655-1-git-send-email-jay.xu@rock-chips.com\0" "ref\02396201.CBcovI4jc4@phil\0" - "From\0Jianqun Xu <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\0" + "From\0Jianqun Xu <jay.xu@rock-chips.com>\0" "Subject\0Re: [PATCH 6/6] ARM64: dts: rockchip: add core dtsi file for rk3399\0" "Date\0Thu, 18 Feb 2016 09:43:37 +0800\0" - "To\0Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\0" - "Cc\0robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org" - pawel.moll-5wv7dgnIgG8@public.gmane.org - mark.rutland-5wv7dgnIgG8@public.gmane.org - ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org - galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org - jwerner-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org - broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org - catalin.marinas-5wv7dgnIgG8@public.gmane.org - will.deacon-5wv7dgnIgG8@public.gmane.org - sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org - linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org - sjoerd.simons-ZGY8ohtN/8pPYcu2f3hruQ@public.gmane.org - huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org - linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - " devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" + "To\0Heiko Stuebner <heiko@sntech.de>\0" + "Cc\0robh+dt@kernel.org" + pawel.moll@arm.com + mark.rutland@arm.com + ijc+devicetree@hellion.org.uk + galak@codeaurora.org + jwerner@chromium.org + broonie@kernel.org + catalin.marinas@arm.com + will.deacon@arm.com + sboyd@codeaurora.org + linus.walleij@linaro.org + sjoerd.simons@collabora.co.uk + huangtao@rock-chips.com + linux-rockchip@lists.infradead.org + linux-kernel@vger.kernel.org + linux-arm-kernel@lists.infradead.org + " devicetree@vger.kernel.org\0" "\00:1\0" "b\0" "\n" @@ -30,7 +30,7 @@ "> Hi Jianqun,\n" ">\n" "> Am Mittwoch, 17. Februar 2016, 10:01:16 schrieb jianqun.xu:\n" - ">> From: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n" + ">> From: Xu Jianqun <jay.xu@rock-chips.com>\n" ">>\n" ">> Add dtsi file for Rockchip rk3399 SoCs, which includes some\n" ">> general nodes such as cpu, pmu, cru, gic, amba and so on.\n" @@ -40,7 +40,7 @@ "> please remove any review-cruft like Change-Ids from mainline patches :-)\n" "ok, will fix it in next version patch\n" ">\n" - ">> Signed-off-by: Xu Jianqun <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n" + ">> Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>\n" ">> ---\n" ">> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 989\n" ">> +++++++++++++++++++++++++++++++ 1 file changed, 989 insertions(+)\n" @@ -303,11 +303,6 @@ "> Heiko\n" ">\n" ">\n" - ">\n" - "\n" - "--\n" - "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" - "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" - More majordomo info at http://vger.kernel.org/majordomo-info.html + > -2b4739ba319d248bc99537995ec02ebcb887aa2948fa8cf32140a923a1253635 +f471433539069b96b7b0b1d9815c599e63584eca8ee147856322bc64b7e49785
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