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diff for duplicates of <56C6664F.8070600@rock-chips.com>

diff --git a/a/1.txt b/N1/1.txt
index 573e91d..76792c7 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,13 +1,13 @@
 Hi Rob
 
-在 18/02/2016 22:36, Rob Herring 写道:
+? 18/02/2016 22:36, Rob Herring ??:
 > On Wed, Feb 17, 2016 at 09:54:49AM +0800, jianqun.xu wrote:
->> From: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
+>> From: Xing Zheng <zhengxing@rock-chips.com>
 >>
 >> Add the devicetree binding for the cru on the rk3399 which quite
 >> similar structured as previous clock controllers.
 >>
->> Signed-off-by: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
+>> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
 >> ---
 >>   .../bindings/clock/rockchip,rk3399-cru.txt         | 82 ++++++++++++++++++++++
 >>   1 file changed, 82 insertions(+)
@@ -25,7 +25,7 @@ Hi Rob
 >
 >> +Example: General Register Files
 >> +
->> +	pmugrf: syscon@ff320000 {
+>> +	pmugrf: syscon at ff320000 {
 >> +		compatible = "rockchip,rk3399-pmugrf", "syscon";
 >
 > Is this documented?
@@ -39,7 +39,7 @@ If you agree, I will add it in next patch
 >> +		reg = <0x0 0xff320000 0x0 0x1000>;
 >> +	};
 >> +
->> +	grf: syscon@ff770000 {
+>> +	grf: syscon at ff770000 {
 >> +		compatible = "rockchip,rk3399-grf", "syscon";
 >
 > ditto.
@@ -49,14 +49,14 @@ If you agree, I will add it in next patch
 >> +
 >> +Example: Clock controller node:
 >> +
->> +	pmucru: pmu-clock-controller@ff750000 {
+>> +	pmucru: pmu-clock-controller at ff750000 {
 >> +		compatible = "rockchip,rk3399-pmucru";
 >> +		reg = <0x0 0xff750000 0x0 0x1000>;
 >> +		#clock-cells = <1>;
 >> +		#reset-cells = <1>;
 >> +	};
 >> +
->> +	cru: clock-controller@ff760000 {
+>> +	cru: clock-controller at ff760000 {
 >> +		compatible = "rockchip,rk3399-cru";
 >> +		reg = <0x0 0xff760000 0x0 0x1000>;
 >> +		rockchip,grf = <&grf>;
@@ -67,7 +67,7 @@ If you agree, I will add it in next patch
 >> +Example: UART controller node that consumes the clock generated by the clock
 >> +  controller:
 >> +
->> +	uart0: serial@ff1a0000 {
+>> +	uart0: serial at ff1a0000 {
 >> +		compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart";
 >> +		reg = <0x0 0xff180000 0x0 0x100>;
 >> +		clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
@@ -83,8 +83,3 @@ If you agree, I will add it in next patch
 >
 >
 >
-
---
-To unsubscribe from this list: send the line "unsubscribe devicetree" in
-the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index dd920d4..dc8c93b 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,40 +1,22 @@
  "ref\01455673992-16469-1-git-send-email-jay.xu@rock-chips.com\0"
  "ref\01455674089-16567-1-git-send-email-jay.xu@rock-chips.com\0"
  "ref\020160218143648.GL9654@rob-hp-laptop\0"
- "From\0Jianqun Xu <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\0"
- "Subject\0Re: [PATCH 5/6] dt-bindings: add documentation of rk3399 clock controller\0"
+ "From\0jay.xu@rock-chips.com (Jianqun Xu)\0"
+ "Subject\0[PATCH 5/6] dt-bindings: add documentation of rk3399 clock controller\0"
  "Date\0Fri, 19 Feb 2016 08:48:15 +0800\0"
- "To\0Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0"
- "Cc\0heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org"
-  pawel.moll-5wv7dgnIgG8@public.gmane.org
-  mark.rutland-5wv7dgnIgG8@public.gmane.org
-  ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org
-  galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
-  jwerner-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org
-  broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
-  catalin.marinas-5wv7dgnIgG8@public.gmane.org
-  will.deacon-5wv7dgnIgG8@public.gmane.org
-  sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
-  linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
-  sjoerd.simons-ZGY8ohtN/8pPYcu2f3hruQ@public.gmane.org
-  huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org
-  linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
-  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
- " Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "Hi Rob\n"
  "\n"
- "\345\234\250 18/02/2016 22:36, Rob Herring \345\206\231\351\201\223:\n"
+ "? 18/02/2016 22:36, Rob Herring ??:\n"
  "> On Wed, Feb 17, 2016 at 09:54:49AM +0800, jianqun.xu wrote:\n"
- ">> From: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n"
+ ">> From: Xing Zheng <zhengxing@rock-chips.com>\n"
  ">>\n"
  ">> Add the devicetree binding for the cru on the rk3399 which quite\n"
  ">> similar structured as previous clock controllers.\n"
  ">>\n"
- ">> Signed-off-by: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n"
+ ">> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>\n"
  ">> ---\n"
  ">>   .../bindings/clock/rockchip,rk3399-cru.txt         | 82 ++++++++++++++++++++++\n"
  ">>   1 file changed, 82 insertions(+)\n"
@@ -52,7 +34,7 @@
  ">\n"
  ">> +Example: General Register Files\n"
  ">> +\n"
- ">> +\tpmugrf: syscon@ff320000 {\n"
+ ">> +\tpmugrf: syscon at ff320000 {\n"
  ">> +\t\tcompatible = \"rockchip,rk3399-pmugrf\", \"syscon\";\n"
  ">\n"
  "> Is this documented?\n"
@@ -66,7 +48,7 @@
  ">> +\t\treg = <0x0 0xff320000 0x0 0x1000>;\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tgrf: syscon@ff770000 {\n"
+ ">> +\tgrf: syscon at ff770000 {\n"
  ">> +\t\tcompatible = \"rockchip,rk3399-grf\", \"syscon\";\n"
  ">\n"
  "> ditto.\n"
@@ -76,14 +58,14 @@
  ">> +\n"
  ">> +Example: Clock controller node:\n"
  ">> +\n"
- ">> +\tpmucru: pmu-clock-controller@ff750000 {\n"
+ ">> +\tpmucru: pmu-clock-controller at ff750000 {\n"
  ">> +\t\tcompatible = \"rockchip,rk3399-pmucru\";\n"
  ">> +\t\treg = <0x0 0xff750000 0x0 0x1000>;\n"
  ">> +\t\t#clock-cells = <1>;\n"
  ">> +\t\t#reset-cells = <1>;\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tcru: clock-controller@ff760000 {\n"
+ ">> +\tcru: clock-controller at ff760000 {\n"
  ">> +\t\tcompatible = \"rockchip,rk3399-cru\";\n"
  ">> +\t\treg = <0x0 0xff760000 0x0 0x1000>;\n"
  ">> +\t\trockchip,grf = <&grf>;\n"
@@ -94,7 +76,7 @@
  ">> +Example: UART controller node that consumes the clock generated by the clock\n"
  ">> +  controller:\n"
  ">> +\n"
- ">> +\tuart0: serial@ff1a0000 {\n"
+ ">> +\tuart0: serial at ff1a0000 {\n"
  ">> +\t\tcompatible = \"rockchip,rk3399-uart\", \"snps,dw-apb-uart\";\n"
  ">> +\t\treg = <0x0 0xff180000 0x0 0x100>;\n"
  ">> +\t\tclocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;\n"
@@ -109,11 +91,6 @@
  ">>\n"
  ">\n"
  ">\n"
- ">\n"
- "\n"
- "--\n"
- "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
- "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
- More majordomo info at  http://vger.kernel.org/majordomo-info.html
+ >
 
-e28f19f1cc77f54f70be4dedb574783e7beeda16f5dcbdcc20fe32d7af321324
+2060fd46a557200406437999699d0b4fd9e593393e5f09b536bbe530b9905062

diff --git a/a/1.txt b/N2/1.txt
index 573e91d..cd4b9ad 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -2,12 +2,12 @@ Hi Rob
 
 在 18/02/2016 22:36, Rob Herring 写道:
 > On Wed, Feb 17, 2016 at 09:54:49AM +0800, jianqun.xu wrote:
->> From: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
+>> From: Xing Zheng <zhengxing@rock-chips.com>
 >>
 >> Add the devicetree binding for the cru on the rk3399 which quite
 >> similar structured as previous clock controllers.
 >>
->> Signed-off-by: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
+>> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
 >> ---
 >>   .../bindings/clock/rockchip,rk3399-cru.txt         | 82 ++++++++++++++++++++++
 >>   1 file changed, 82 insertions(+)
@@ -83,8 +83,3 @@ If you agree, I will add it in next patch
 >
 >
 >
-
---
-To unsubscribe from this list: send the line "unsubscribe devicetree" in
-the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N2/content_digest
index dd920d4..21bb232 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,40 +1,40 @@
  "ref\01455673992-16469-1-git-send-email-jay.xu@rock-chips.com\0"
  "ref\01455674089-16567-1-git-send-email-jay.xu@rock-chips.com\0"
  "ref\020160218143648.GL9654@rob-hp-laptop\0"
- "From\0Jianqun Xu <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\0"
+ "From\0Jianqun Xu <jay.xu@rock-chips.com>\0"
  "Subject\0Re: [PATCH 5/6] dt-bindings: add documentation of rk3399 clock controller\0"
  "Date\0Fri, 19 Feb 2016 08:48:15 +0800\0"
- "To\0Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0"
- "Cc\0heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org"
-  pawel.moll-5wv7dgnIgG8@public.gmane.org
-  mark.rutland-5wv7dgnIgG8@public.gmane.org
-  ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org
-  galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
-  jwerner-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org
-  broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
-  catalin.marinas-5wv7dgnIgG8@public.gmane.org
-  will.deacon-5wv7dgnIgG8@public.gmane.org
-  sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
-  linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
-  sjoerd.simons-ZGY8ohtN/8pPYcu2f3hruQ@public.gmane.org
-  huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org
-  linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
-  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
- " Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\0"
+ "To\0Rob Herring <robh@kernel.org>\0"
+ "Cc\0heiko@sntech.de"
+  pawel.moll@arm.com
+  mark.rutland@arm.com
+  ijc+devicetree@hellion.org.uk
+  galak@codeaurora.org
+  jwerner@chromium.org
+  broonie@kernel.org
+  catalin.marinas@arm.com
+  will.deacon@arm.com
+  sboyd@codeaurora.org
+  linus.walleij@linaro.org
+  sjoerd.simons@collabora.co.uk
+  huangtao@rock-chips.com
+  linux-rockchip@lists.infradead.org
+  linux-kernel@vger.kernel.org
+  linux-arm-kernel@lists.infradead.org
+  devicetree@vger.kernel.org
+ " Xing Zheng <zhengxing@rock-chips.com>\0"
  "\00:1\0"
  "b\0"
  "Hi Rob\n"
  "\n"
  "\345\234\250 18/02/2016 22:36, Rob Herring \345\206\231\351\201\223:\n"
  "> On Wed, Feb 17, 2016 at 09:54:49AM +0800, jianqun.xu wrote:\n"
- ">> From: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n"
+ ">> From: Xing Zheng <zhengxing@rock-chips.com>\n"
  ">>\n"
  ">> Add the devicetree binding for the cru on the rk3399 which quite\n"
  ">> similar structured as previous clock controllers.\n"
  ">>\n"
- ">> Signed-off-by: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n"
+ ">> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>\n"
  ">> ---\n"
  ">>   .../bindings/clock/rockchip,rk3399-cru.txt         | 82 ++++++++++++++++++++++\n"
  ">>   1 file changed, 82 insertions(+)\n"
@@ -109,11 +109,6 @@
  ">>\n"
  ">\n"
  ">\n"
- ">\n"
- "\n"
- "--\n"
- "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
- "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
- More majordomo info at  http://vger.kernel.org/majordomo-info.html
+ >
 
-e28f19f1cc77f54f70be4dedb574783e7beeda16f5dcbdcc20fe32d7af321324
+6c1a566f68bea9591fdd889790cef0247d311a8a091f1b809d74d064c88a521f

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