From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57567) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aWhpL-00056T-RO for qemu-devel@nongnu.org; Fri, 19 Feb 2016 04:58:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aWhpI-0006Jk-LH for qemu-devel@nongnu.org; Fri, 19 Feb 2016 04:58:19 -0500 Received: from mail-wm0-x22e.google.com ([2a00:1450:400c:c09::22e]:36364) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aWhpI-0006Je-EL for qemu-devel@nongnu.org; Fri, 19 Feb 2016 04:58:16 -0500 Received: by mail-wm0-x22e.google.com with SMTP id g62so67920325wme.1 for ; Fri, 19 Feb 2016 01:58:15 -0800 (PST) Sender: Paolo Bonzini References: <1455852618-5224-1-git-send-email-peterx@redhat.com> <56C6BA42.1050302@web.de> <20160219074300.GC17229@pxdev.xzpeter.org> <56C6D3A0.9070302@web.de> <20160219092931.GD17229@pxdev.xzpeter.org> From: Paolo Bonzini Message-ID: <56C6E734.90204@redhat.com> Date: Fri, 19 Feb 2016 10:58:12 +0100 MIME-Version: 1.0 In-Reply-To: <20160219092931.GD17229@pxdev.xzpeter.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH 00/13] IOMMU: Enable interrupt remapping for Intel IOMMU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Xu , Jan Kiszka Cc: Rita Sinha , ehabkost@redhat.com, =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= , jasowang@redhat.com, mst@redhat.com, qemu-devel@nongnu.org, imammedo@redhat.com, rth@twiddle.net On 19/02/2016 10:29, Peter Xu wrote: > On Fri, Feb 19, 2016 at 09:34:40AM +0100, Jan Kiszka wrote: >> On 2016-02-19 08:43, Peter Xu wrote: >>> Actually there are several people within my working team knows that >>> I would be working on this, and I believe none of us do know your >>> work too... Or there must be someone telling me so... >> >> I guess we would have to match sets of people know to find out who >> forgot to mention the outreachy project ;) - anyway, this can always happen. I knew about the outreachy project and forgot to mention it... but then, I only learnt about your effort yesterday. :) >> I didn't look into your approach in all details yet, and Rita also just >> started, she told me. So one question on yours - which looks appealing >> from the invasiveness POV - is how you determine the MSI source with >> only a single target region? I do find your changes on the IOAPIC, but >> none on the PCI infrastructure, which is confusing given that you say >> that works, no? > > Do we need to know the source of the MSI interrupt to > translate/deliver it? Maybe I got something missing, but could you > explain why we need it? I think you're not verifying the SVT, SID and SQ fields in the IRTE. The source ID can be passed to the IOMMU using the MemTxAttrs mechanism. >>> So what I was planning is that, this series will be the start. And >>> the above two is the first-step goal (and I may need kvm-ioapic as >>> well though). >> >> KVM support is actually a key thing, that's why we started the project >> on integrating the patches with the split irqchip work. There was a >> consensus with Paolo long ago that full in-kernel irqchip will no longer >> gain any additional support that is needed for IR. Agreed. > Do you have any link to the discussion? I am just curious about it, > thanks in advance. I couldn't find anything in kvm@vger.kernel.org, sorry. >>>> - Radim was telling me to look on this as well. How do your efforts >>>> correlate? FWIW, Radim was thinking of interrupt remapping in the kvm-ioapic, which we have decided to set aside. Paolo