From: Jan Kiszka <jan.kiszka@web.de>
To: Peter Xu <peterx@redhat.com>
Cc: "Rita Sinha" <rita.sinha89@gmail.com>,
ehabkost@redhat.com, "Radim Krčmář" <rkrcmar@redhat.com>,
jasowang@redhat.com, mst@redhat.com, qemu-devel@nongnu.org,
imammedo@redhat.com, "Paolo Bonzini" <pbonzini@redhat.com>,
rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH 00/13] IOMMU: Enable interrupt remapping for Intel IOMMU
Date: Fri, 19 Feb 2016 12:43:59 +0100 [thread overview]
Message-ID: <56C6FFFF.2030608@web.de> (raw)
In-Reply-To: <20160219113934.GB11961@pxdev.xzpeter.org>
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On 2016-02-19 12:39, Peter Xu wrote:
> On Fri, Feb 19, 2016 at 11:15:06AM +0100, Jan Kiszka wrote:
>> On 2016-02-19 10:58, Paolo Bonzini wrote:
>>> I think you're not verifying the SVT, SID and SQ fields in the IRTE.
>>
>> Exactly.
>>
>>>
>>> The source ID can be passed to the IOMMU using the MemTxAttrs mechanism.
>>
>> Ah, that's a nice new channel, resolving the need for using/passing
>> source-specific target memory regions for this. At least for PCI
>> devices, it should already be populated with the required information,
>> others (IOAPIC, HPET) probably require additional work to pass what I
>> defined as Q35_PSEUDO_BUS_PLATFORM, Q35_PSEUDO_DEVFN_IOAPIC/HPET.
>
> Jan, Rita, Paolo,
>
> One more thing to ask: do we have any plan to move on the work to
> support vhost/pass-through devices? Do you think we need these too?
We need them eventually as well, but - unless some of them just work by
chance (unlikely) - that was not in the scope if the ongoing project,
rather a potential add-on for later.
Jan
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next prev parent reply other threads:[~2016-02-19 11:44 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-19 3:30 [Qemu-devel] [PATCH 00/13] IOMMU: Enable interrupt remapping for Intel IOMMU Peter Xu
2016-02-19 3:30 ` [Qemu-devel] [PATCH 01/13] q35: add "int-remap" flag to enable intr Peter Xu
2016-02-21 10:38 ` Marcel Apfelbaum
2016-02-23 3:48 ` Peter Xu
2016-02-25 15:47 ` Marcel Apfelbaum
2016-04-08 7:30 ` Peter Xu
2016-04-11 10:07 ` Marcel Apfelbaum
2016-02-19 3:30 ` [Qemu-devel] [PATCH 02/13] acpi: enable INTR for DMAR report structure Peter Xu
2016-02-21 11:05 ` Marcel Apfelbaum
2016-04-08 8:07 ` Peter Xu
2016-02-19 3:30 ` [Qemu-devel] [PATCH 03/13] intel_iommu: allow queued invalidation for IR Peter Xu
2016-02-19 3:30 ` [Qemu-devel] [PATCH 04/13] intel_iommu: set IR bit for ECAP register Peter Xu
2016-02-19 3:30 ` [Qemu-devel] [PATCH 05/13] acpi: add DMAR scope definition for root IOAPIC Peter Xu
2016-02-21 11:38 ` Marcel Apfelbaum
2016-02-21 12:08 ` Marcel Apfelbaum
2016-02-21 13:40 ` Jan Kiszka
2016-02-21 15:54 ` Marcel Apfelbaum
2016-02-21 16:01 ` Jan Kiszka
2016-04-08 9:53 ` Peter Xu
2016-02-19 3:30 ` [Qemu-devel] [PATCH 06/13] intel_iommu: define interrupt remap table addr register Peter Xu
2016-02-19 3:30 ` [Qemu-devel] [PATCH 07/13] intel_iommu: handle interrupt remap enable Peter Xu
2016-02-19 3:30 ` [Qemu-devel] [PATCH 08/13] intel_iommu: define several structs for IOMMU IR Peter Xu
2016-02-19 3:30 ` [Qemu-devel] [PATCH 09/13] intel_iommu: provide helper function vtd_get_iommu Peter Xu
2016-02-19 3:30 ` [Qemu-devel] [PATCH 10/13] ioapic-common: add iommu for IOAPICCommonState Peter Xu
2016-02-19 3:30 ` [Qemu-devel] [PATCH 11/13] intel_iommu: add IR translation faults defines Peter Xu
2016-02-21 15:56 ` Marcel Apfelbaum
2016-04-08 10:03 ` Peter Xu
2016-02-19 3:30 ` [Qemu-devel] [PATCH 12/13] intel_iommu: ioapic: IR support for emulated IOAPIC Peter Xu
2016-02-19 3:30 ` [Qemu-devel] [PATCH 13/13] intel_iommu: Add support for PCI MSI remap Peter Xu
2016-02-19 6:46 ` [Qemu-devel] [PATCH 00/13] IOMMU: Enable interrupt remapping for Intel IOMMU Jan Kiszka
2016-02-19 7:43 ` Peter Xu
2016-02-19 8:34 ` Jan Kiszka
2016-02-19 9:29 ` Peter Xu
2016-02-19 9:58 ` Paolo Bonzini
2016-02-19 10:15 ` Jan Kiszka
2016-02-19 11:39 ` Peter Xu
2016-02-19 11:43 ` Jan Kiszka [this message]
2016-02-19 11:34 ` Peter Xu
2016-02-19 11:43 ` Jan Kiszka
2016-02-19 16:22 ` Radim Krčmář
2016-02-20 10:05 ` Jan Kiszka
2016-02-19 16:38 ` Radim Krčmář
2016-02-23 5:03 ` Peter Xu
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