diff for duplicates of <56CC8652.8020208@nvidia.com> diff --git a/a/1.txt b/N1/1.txt index fc62d8b..6190074 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -5,7 +5,7 @@ On 02/23/2016 08:04 AM, Thierry Reding wrote: >> The default DMA mask covers a 32 bits address range, but tegradrm >> can address more than that. Set the DMA mask to the actual >> addressable range to avoid the use of unneeded bounce buffers. >> >> -Signed-off-by: Alexandre Courbot <acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> --- Thierry, >> I +Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> --- Thierry, >> I am not absolutely sure whether the size is correct and applies to >> all Tegra generations - please let me know if this needs to be >> reworked. >> >> drivers/gpu/drm/tegra/drm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/a/content_digest b/N1/content_digest index 740e668..14e0c8e 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,16 +1,16 @@ "ref\01456208754-12362-1-git-send-email-acourbot@nvidia.com\0" "ref\01456208754-12362-2-git-send-email-acourbot@nvidia.com\0" "ref\020160223160440.GE27656@ulmo\0" - "From\0Terje Bergstrom <tbergstrom-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" + "From\0Terje Bergstrom <tbergstrom@nvidia.com>\0" "Subject\0Re: [PATCH 2/2] drm/tegra: Set the DMA mask\0" "Date\0Tue, 23 Feb 2016 08:18:26 -0800\0" - "To\0Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>" - " Alexandre Courbot <acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Cc\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>" - dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - " gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0" + "To\0Thierry Reding <thierry.reding@gmail.com>" + " Alexandre Courbot <acourbot@nvidia.com>\0" + "Cc\0Stephen Warren <swarren@wwwdotorg.org>" + <dri-devel@lists.freedesktop.org> + <linux-tegra@vger.kernel.org> + <linux-kernel@vger.kernel.org> + " <gnurou@gmail.com>\0" "\00:1\0" "b\0" "\n" @@ -20,7 +20,7 @@ " >> The default DMA mask covers a 32 bits address range, but tegradrm >> \n" "can address more than that. Set the DMA mask to the actual >> \n" "addressable range to avoid the use of unneeded bounce buffers. >> >> \n" - "Signed-off-by: Alexandre Courbot <acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> --- Thierry, >> I \n" + "Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> --- Thierry, >> I \n" "am not absolutely sure whether the size is correct and applies to >> all \n" "Tegra generations - please let me know if this needs to be >> reworked. \n" " >> >> drivers/gpu/drm/tegra/drm.c | 1 + 1 file changed, 1 insertion(+) \n" @@ -38,4 +38,4 @@ "IOMMU addresses are limited by Tegra SMMU to 32-bit for gk20a. gm20b can use\n" 34-bit if SMMU is configured to combine four ASIDs together. -3b9272e620c5c1a1ed3ba6359a2d328718acb593b659bf44177f4c050927b13d +91a2865514566f64749af564d48ec361714afdc17d2a56f49f5ab34a5fdb9ecc
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