diff for duplicates of <56CD6BF1.8040107@nvidia.com> diff --git a/a/1.txt b/N1/1.txt index 2bb28b1..6119dab 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -6,7 +6,7 @@ On 02/24/2016 01:04 AM, Thierry Reding wrote: >> address more than that. Set the DMA mask to the actual addressable range >> to avoid the use of unneeded bounce buffers. >> ->> Signed-off-by: Alexandre Courbot <acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +>> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> >> --- >> Thierry, I am not absolutely sure whether the size is correct and applies >> to all Tegra generations - please let me know if this needs to be diff --git a/a/content_digest b/N1/content_digest index 32c13dd..765f824 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,16 +1,16 @@ "ref\01456208754-12362-1-git-send-email-acourbot@nvidia.com\0" "ref\01456208754-12362-2-git-send-email-acourbot@nvidia.com\0" "ref\020160223160440.GE27656@ulmo\0" - "From\0Alexandre Courbot <acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" + "From\0Alexandre Courbot <acourbot@nvidia.com>\0" "Subject\0Re: [PATCH 2/2] drm/tegra: Set the DMA mask\0" "Date\0Wed, 24 Feb 2016 17:38:09 +0900\0" - "To\0Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" - "Cc\0Terje Bergstr\303\266m <tbergstrom-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>" - Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> - dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - " gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0" + "To\0Thierry Reding <thierry.reding@gmail.com>\0" + "Cc\0Terje Bergstr\303\266m <tbergstrom@nvidia.com>" + Stephen Warren <swarren@wwwdotorg.org> + dri-devel@lists.freedesktop.org + linux-tegra@vger.kernel.org + linux-kernel@vger.kernel.org + " gnurou@gmail.com\0" "\00:1\0" "b\0" "On 02/24/2016 01:04 AM, Thierry Reding wrote:\n" @@ -21,7 +21,7 @@ ">> address more than that. Set the DMA mask to the actual addressable range\n" ">> to avoid the use of unneeded bounce buffers.\n" ">>\n" - ">> Signed-off-by: Alexandre Courbot <acourbot-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + ">> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>\n" ">> ---\n" ">> Thierry, I am not absolutely sure whether the size is correct and applies\n" ">> to all Tegra generations - please let me know if this needs to be\n" @@ -56,4 +56,4 @@ "I cannot think of a better heuristics than \"assume 32 bits on < t124 and \n" "34 bits afterwards\"." -0b1e0d94c2d8af8d427efcb6b1aff5ebda1916ef832ea7d67bae73f6a90de7fa +b862ba10fdda04643b443bd9bc1a3165c58abf35c96b14a5bc661bfb14b73774
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