From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from email.microchip.com (exsmtp01.microchip.com. [198.175.253.37]) by gmr-mx.google.com with ESMTPS id yd9si1292668pab.1.2016.02.25.08.23.10 for (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 25 Feb 2016 08:23:10 -0800 (PST) Subject: [rtc-linux] Re: [PATCH v2 2/2] rtc: rtc-pic32: Add PIC32 real time clock driver To: Alexandre Belloni References: <1455905390-3491-2-git-send-email-joshua.henderson@microchip.com> <20160224222555.GA12073@piout.net> CC: , , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Alessandro Zummo , From: Joshua Henderson Message-ID: <56CF2A9B.5080005@microchip.com> Date: Thu, 25 Feb 2016 09:23:55 -0700 MIME-Version: 1.0 In-Reply-To: <20160224222555.GA12073@piout.net> Content-Type: text/plain; charset=UTF-8 Reply-To: rtc-linux@googlegroups.com List-ID: List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , On 02/24/2016 03:25 PM, Alexandre Belloni wrote: > Hi, > > On 19/02/2016 at 11:09:45 -0700, Joshua Henderson wrote : >> +static int pic32_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) >> +{ >> + struct pic32_rtc_dev *pdata = dev_get_drvdata(dev); >> + void __iomem *base = pdata->reg_base; >> + unsigned int tries = 0; >> + >> + clk_enable(pdata->clk); >> + >> + do { >> + rtc_tm->tm_hour = readb(base + PIC32_RTCHOUR); >> + rtc_tm->tm_min = readb(base + PIC32_RTCMIN); >> + rtc_tm->tm_mon = readb(base + PIC32_RTCMON); >> + rtc_tm->tm_mday = readb(base + PIC32_RTCDAY); >> + rtc_tm->tm_year = readb(base + PIC32_RTCYEAR); >> + rtc_tm->tm_sec = readb(base + PIC32_RTCSEC); >> + >> + /* >> + * The only way to work out whether the system was mid-update >> + * when we read it is to check the second counter, and if it >> + * is zero, then we re-try the entire read. >> + */ >> + tries = 1; >> + } while (rtc_tm->tm_sec == 0 && tries < 2); >> + > > This doesn't seem right. It will wait up to a second as tries will > always be less than 2, this is probably not what you want. Dang good catch. When fixed, it will work as expected: # hwclock tries 1 Sun Oct 17 19:23:59 2010 0.000000 seconds # hwclock tries 1 tries 2 Sun Oct 17 19:24:00 2010 0.000000 seconds # hwclock tries 1 Sun Oct 17 19:24:01 2010 0.000000 seconds Josh -- -- You received this message because you are subscribed to "rtc-linux". Membership options at http://groups.google.com/group/rtc-linux . Please read http://groups.google.com/group/rtc-linux/web/checklist before submitting a driver. --- You received this message because you are subscribed to the Google Groups "rtc-linux" group. To unsubscribe from this group and stop receiving emails from it, send an email to rtc-linux+unsubscribe@googlegroups.com. For more options, visit https://groups.google.com/d/optout. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Joshua Henderson Subject: Re: [PATCH v2 2/2] rtc: rtc-pic32: Add PIC32 real time clock driver Date: Thu, 25 Feb 2016 09:23:55 -0700 Message-ID: <56CF2A9B.5080005@microchip.com> References: <1455905390-3491-2-git-send-email-joshua.henderson@microchip.com> <20160224222555.GA12073@piout.net> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20160224222555.GA12073-m++hUPXGwpdeoWH0uzbU5w@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Alexandre Belloni Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Alessandro Zummo , rtc-linux-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org On 02/24/2016 03:25 PM, Alexandre Belloni wrote: > Hi, > > On 19/02/2016 at 11:09:45 -0700, Joshua Henderson wrote : >> +static int pic32_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) >> +{ >> + struct pic32_rtc_dev *pdata = dev_get_drvdata(dev); >> + void __iomem *base = pdata->reg_base; >> + unsigned int tries = 0; >> + >> + clk_enable(pdata->clk); >> + >> + do { >> + rtc_tm->tm_hour = readb(base + PIC32_RTCHOUR); >> + rtc_tm->tm_min = readb(base + PIC32_RTCMIN); >> + rtc_tm->tm_mon = readb(base + PIC32_RTCMON); >> + rtc_tm->tm_mday = readb(base + PIC32_RTCDAY); >> + rtc_tm->tm_year = readb(base + PIC32_RTCYEAR); >> + rtc_tm->tm_sec = readb(base + PIC32_RTCSEC); >> + >> + /* >> + * The only way to work out whether the system was mid-update >> + * when we read it is to check the second counter, and if it >> + * is zero, then we re-try the entire read. >> + */ >> + tries = 1; >> + } while (rtc_tm->tm_sec == 0 && tries < 2); >> + > > This doesn't seem right. It will wait up to a second as tries will > always be less than 2, this is probably not what you want. Dang good catch. When fixed, it will work as expected: # hwclock tries 1 Sun Oct 17 19:23:59 2010 0.000000 seconds # hwclock tries 1 tries 2 Sun Oct 17 19:24:00 2010 0.000000 seconds # hwclock tries 1 Sun Oct 17 19:24:01 2010 0.000000 seconds Josh -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760859AbcBYQXM (ORCPT ); Thu, 25 Feb 2016 11:23:12 -0500 Received: from exsmtp01.microchip.com ([198.175.253.37]:58231 "EHLO email.microchip.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753461AbcBYQXK (ORCPT ); Thu, 25 Feb 2016 11:23:10 -0500 Subject: Re: [PATCH v2 2/2] rtc: rtc-pic32: Add PIC32 real time clock driver To: Alexandre Belloni References: <1455905390-3491-2-git-send-email-joshua.henderson@microchip.com> <20160224222555.GA12073@piout.net> CC: , , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Alessandro Zummo , From: Joshua Henderson Message-ID: <56CF2A9B.5080005@microchip.com> Date: Thu, 25 Feb 2016 09:23:55 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.5.1 MIME-Version: 1.0 In-Reply-To: <20160224222555.GA12073@piout.net> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 02/24/2016 03:25 PM, Alexandre Belloni wrote: > Hi, > > On 19/02/2016 at 11:09:45 -0700, Joshua Henderson wrote : >> +static int pic32_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) >> +{ >> + struct pic32_rtc_dev *pdata = dev_get_drvdata(dev); >> + void __iomem *base = pdata->reg_base; >> + unsigned int tries = 0; >> + >> + clk_enable(pdata->clk); >> + >> + do { >> + rtc_tm->tm_hour = readb(base + PIC32_RTCHOUR); >> + rtc_tm->tm_min = readb(base + PIC32_RTCMIN); >> + rtc_tm->tm_mon = readb(base + PIC32_RTCMON); >> + rtc_tm->tm_mday = readb(base + PIC32_RTCDAY); >> + rtc_tm->tm_year = readb(base + PIC32_RTCYEAR); >> + rtc_tm->tm_sec = readb(base + PIC32_RTCSEC); >> + >> + /* >> + * The only way to work out whether the system was mid-update >> + * when we read it is to check the second counter, and if it >> + * is zero, then we re-try the entire read. >> + */ >> + tries = 1; >> + } while (rtc_tm->tm_sec == 0 && tries < 2); >> + > > This doesn't seem right. It will wait up to a second as tries will > always be less than 2, this is probably not what you want. Dang good catch. When fixed, it will work as expected: # hwclock tries 1 Sun Oct 17 19:23:59 2010 0.000000 seconds # hwclock tries 1 tries 2 Sun Oct 17 19:24:00 2010 0.000000 seconds # hwclock tries 1 Sun Oct 17 19:24:01 2010 0.000000 seconds Josh