From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52956) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aaCsk-0005Wn-AW for qemu-devel@nongnu.org; Sun, 28 Feb 2016 20:44:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aaCsg-0003Ub-3w for qemu-devel@nongnu.org; Sun, 28 Feb 2016 20:44:18 -0500 Received: from mail-pa0-x244.google.com ([2607:f8b0:400e:c03::244]:36390) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aaCsf-0003Ty-Q6 for qemu-devel@nongnu.org; Sun, 28 Feb 2016 20:44:14 -0500 Received: by mail-pa0-x244.google.com with SMTP id a7so6442884pax.3 for ; Sun, 28 Feb 2016 17:44:13 -0800 (PST) References: <1456486323-8047-1-git-send-email-david@gibson.dropbear.id.au> <1456486323-8047-8-git-send-email-david@gibson.dropbear.id.au> From: Alexey Kardashevskiy Message-ID: <56D3A260.3080003@ozlabs.ru> Date: Mon, 29 Feb 2016 12:44:00 +1100 MIME-Version: 1.0 In-Reply-To: <1456486323-8047-8-git-send-email-david@gibson.dropbear.id.au> Content-Type: text/plain; charset=koi8-r; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 07/12] spapr_pci: Fold spapr_phb_vfio_eeh_set_option() into spapr_pci code List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson , benh@kernel.crashing.org Cc: agraf@suse.de, qemu-devel@nongnu.org, gwshan@au1.ibm.com, mdroth@linux.vnet.ibm.com, alex.williamson@redhat.com, qemu-ppc@nongnu.org On 02/26/2016 10:31 PM, David Gibson wrote: > Simplify the sPAPR PCI code by folding spapr_phb_eeh_set_option() into > rtas_ibm_set_eeh_option(). > > Signed-off-by: David Gibson Reviewed-by: Alexey Kardashevskiy > --- > hw/ppc/spapr_pci.c | 43 +++++++++++++++++++++++++++++++++++++++-- > hw/ppc/spapr_pci_vfio.c | 47 --------------------------------------------- > include/hw/pci-host/spapr.h | 4 ---- > 3 files changed, 41 insertions(+), 53 deletions(-) > > diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c > index eaae7e2..26d08ad 100644 > --- a/hw/ppc/spapr_pci.c > +++ b/hw/ppc/spapr_pci.c > @@ -450,6 +450,7 @@ static void rtas_ibm_set_eeh_option(PowerPCCPU *cpu, > sPAPRPHBState *sphb; > uint32_t addr, option; > uint64_t buid; > + uint32_t op; > int ret; > > if ((nargs != 4) || (nret != 1)) { > @@ -469,8 +470,46 @@ static void rtas_ibm_set_eeh_option(PowerPCCPU *cpu, > goto param_error_exit; > } > > - ret = spapr_phb_vfio_eeh_set_option(sphb, addr, option); > - rtas_st(rets, 0, ret); > + switch (option) { > + case RTAS_EEH_DISABLE: > + op = VFIO_EEH_PE_DISABLE; > + break; > + case RTAS_EEH_ENABLE: { > + PCIHostState *phb; > + PCIDevice *pdev; > + > + /* > + * The EEH functionality is enabled on basis of PCI device, > + * instead of PE. We need check the validity of the PCI > + * device address. > + */ > + phb = PCI_HOST_BRIDGE(sphb); > + pdev = pci_find_device(phb->bus, > + (addr >> 16) & 0xFF, (addr >> 8) & 0xFF); > + if (!pdev || !object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { > + goto param_error_exit; > + } > + > + op = VFIO_EEH_PE_ENABLE; > + break; > + } > + case RTAS_EEH_THAW_IO: > + op = VFIO_EEH_PE_UNFREEZE_IO; > + break; > + case RTAS_EEH_THAW_DMA: > + op = VFIO_EEH_PE_UNFREEZE_DMA; > + break; > + default: > + goto param_error_exit; > + } > + > + ret = vfio_eeh_as_op(&sphb->iommu_as, op); > + if (ret < 0) { > + rtas_st(rets, 0, RTAS_OUT_HW_ERROR); > + return; > + } > + > + rtas_st(rets, 0, RTAS_OUT_SUCCESS); > return; > > param_error_exit: > diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c > index c87f2e4..cccd444 100644 > --- a/hw/ppc/spapr_pci_vfio.c > +++ b/hw/ppc/spapr_pci_vfio.c > @@ -89,53 +89,6 @@ void spapr_phb_vfio_reset(DeviceState *qdev) > spapr_phb_vfio_eeh_reenable(SPAPR_PCI_HOST_BRIDGE(qdev)); > } > > -int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb, > - unsigned int addr, int option) > -{ > - uint32_t op; > - int ret; > - > - switch (option) { > - case RTAS_EEH_DISABLE: > - op = VFIO_EEH_PE_DISABLE; > - break; > - case RTAS_EEH_ENABLE: { > - PCIHostState *phb; > - PCIDevice *pdev; > - > - /* > - * The EEH functionality is enabled on basis of PCI device, > - * instead of PE. We need check the validity of the PCI > - * device address. > - */ > - phb = PCI_HOST_BRIDGE(sphb); > - pdev = pci_find_device(phb->bus, > - (addr >> 16) & 0xFF, (addr >> 8) & 0xFF); > - if (!pdev || !object_dynamic_cast(OBJECT(pdev), "vfio-pci")) { > - return RTAS_OUT_PARAM_ERROR; > - } > - > - op = VFIO_EEH_PE_ENABLE; > - break; > - } > - case RTAS_EEH_THAW_IO: > - op = VFIO_EEH_PE_UNFREEZE_IO; > - break; > - case RTAS_EEH_THAW_DMA: > - op = VFIO_EEH_PE_UNFREEZE_DMA; > - break; > - default: > - return RTAS_OUT_PARAM_ERROR; > - } > - > - ret = vfio_eeh_as_op(&sphb->iommu_as, op); > - if (ret < 0) { > - return RTAS_OUT_HW_ERROR; > - } > - > - return RTAS_OUT_SUCCESS; > -} > - > static void spapr_phb_vfio_class_init(ObjectClass *klass, void *data) > { > DeviceClass *dc = DEVICE_CLASS(klass); > diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h > index 55237fc..d32750e 100644 > --- a/include/hw/pci-host/spapr.h > +++ b/include/hw/pci-host/spapr.h > @@ -135,8 +135,4 @@ PCIDevice *spapr_pci_find_dev(sPAPRMachineState *spapr, uint64_t buid, > uint32_t config_addr); > void spapr_phb_vfio_reset(DeviceState *qdev); > > -/* VFIO EEH hooks */ > -int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb, > - unsigned int addr, int option); > - > #endif /* __HW_SPAPR_PCI_H__ */ > -- Alexey