From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tomi Valkeinen Subject: Re: [PATCHv2 20/31] drm/omap: HDMI: Fix HSW value Date: Tue, 1 Mar 2016 10:32:32 +0200 Message-ID: <56D553A0.9020003@ti.com> References: <1456479379-6086-1-git-send-email-tomi.valkeinen@ti.com> <1456479379-6086-21-git-send-email-tomi.valkeinen@ti.com> <11295071.bJVeF4RKFr@avalon> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0463152021==" Return-path: Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) by gabe.freedesktop.org (Postfix) with ESMTPS id C03C76E3AB for ; Tue, 1 Mar 2016 08:32:38 +0000 (UTC) In-Reply-To: <11295071.bJVeF4RKFr@avalon> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Laurent Pinchart Cc: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org --===============0463152021== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="0bm9DT2drH6HMC1Qo6kRTVUXibN9UJvo0" --0bm9DT2drH6HMC1Qo6kRTVUXibN9UJvo0 Content-Type: multipart/mixed; boundary="CO693lcp7eGm9tb3wNdKMX9bFx1crC478" From: Tomi Valkeinen To: Laurent Pinchart Cc: dri-devel@lists.freedesktop.org, Rob Clark Message-ID: <56D553A0.9020003@ti.com> Subject: Re: [PATCHv2 20/31] drm/omap: HDMI: Fix HSW value References: <1456479379-6086-1-git-send-email-tomi.valkeinen@ti.com> <1456479379-6086-21-git-send-email-tomi.valkeinen@ti.com> <11295071.bJVeF4RKFr@avalon> In-Reply-To: <11295071.bJVeF4RKFr@avalon> --CO693lcp7eGm9tb3wNdKMX9bFx1crC478 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On 29/02/16 23:55, Laurent Pinchart wrote: > Hi Tomi, >=20 > Thank you for the patch. >=20 > On Friday 26 February 2016 11:36:08 Tomi Valkeinen wrote: >> On OMAP4 and OMAP5 ES1.0 the HDMI_WP_VIDEO_TIMING_H:HSW field is >> set directly to the HSW value. On later SoCs the field needs to be >> programmed with the value of HSW-1. >> >> Currently the driver always programs the field with the HSW value. Mos= t >> videomodes seem to work fine with that, but at least low resolution >> interlaced modes don't work at all. >> >> This patch fixes the HSW for OMAP5 ES2.0+ SoCs. >> >> Signed-off-by: Tomi Valkeinen >> --- >> drivers/gpu/drm/omapdrm/dss/hdmi_wp.c | 14 +++++++++++++- >> 1 file changed, 13 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c >> b/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c index 7c544bc56fb5..48ffb39663= c8 >> 100644 >> --- a/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c >> +++ b/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c >> @@ -165,12 +165,24 @@ void hdmi_wp_video_config_timing(struct hdmi_wp_= data >> *wp, { >> u32 timing_h =3D 0; >> u32 timing_v =3D 0; >> + bool hsw_minus_one =3D true; >> >> DSSDBG("Enter hdmi_wp_video_config_timing\n"); >> >> + /* >> + * On OMAP4 and OMAP5 ES1 the HSW field is programmed as is. On OMAP= 5 >> + * ES2+ (including DRA7/AM5 SoCs) HSW field is programmed to hsw-1. >> + * However, we don't support OMAP5 ES1 at all, so we can just check = for >> + * OMAP4 here. >> + */ >> + if (omapdss_get_version() =3D=3D OMAPDSS_VER_OMAP4430_ES1 || >> + omapdss_get_version() =3D=3D OMAPDSS_VER_OMAP4430_ES2 || >> + omapdss_get_version() =3D=3D OMAPDSS_VER_OMAP4) >> + hsw_minus_one =3D false; >> + >> timing_h |=3D FLD_VAL(timings->hbp, 31, 20); >> timing_h |=3D FLD_VAL(timings->hfp, 19, 8); >> - timing_h |=3D FLD_VAL(timings->hsw, 7, 0); >> + timing_h |=3D FLD_VAL(timings->hsw - (hsw_minus_one ? 1 : 0), 7, 0);= >=20 > If you named the variable hsw_offset, make it an unsigned int, initiali= zed it=20 > to 1 and set it to 0 instead of false, you could write this as Thanks, that's a bit cleaner. I've made the change. Tomi --CO693lcp7eGm9tb3wNdKMX9bFx1crC478-- --0bm9DT2drH6HMC1Qo6kRTVUXibN9UJvo0 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAEBCAAGBQJW1VOgAAoJEPo9qoy8lh716lAP/2cmkbgShKwh/PQTfymTj5+F Qg//052KvaA2Pyd93zDPj2/7Q4H+b4C1DZZFvyfoysO1vnkFtGno4e5QrqzHqyJG i0oGmsrYMc9BzDvvKEmVn6VQfuzdiw5GIId6EE+jfqsskhV5HZv96BX1Opoveaw8 jr1mU3xNkquiMRGn0XK228Lg9CeZLlV38MO7H98viQw5G2AUDxeakrpFKDdHvI0M N/IE84r2WgfoFztQOIjqaHvoYqEDkhP/UXxpN5AnkUJtE4mrH/Ao7f/fMNuIi1wd ZGIlaZShutlhwDKgSOOu3CrT9yq2HIq3T8drnsVCWaabWdCufjbi4XKAnHc79GFa bpBplop9SQqcY15PB1rMxqDYg8RZKjpiKslPiguQgBKsZeCCLzVR/DB/GfIQ97ND tlJ7BFIL6O/xv2IgA4gHhEPRY0c5h/VZLXwVd7MdOKoC6hDMTJBw/UcTpgGDdtgR /HLmMi9OOBgT69uKTDfXjvgmC2tigtyhl2lKzspzYCOdLdzT06UR2UfOlQNew/Pn 9ABlODiKyaO4+RWkE+lcWQgtfFJlxhzcxbcydzMOLe0qMDoRyTJByMc49O6CSCeJ QlpVZB2TkgTEY6CrwGN13enjf9Hzm4oVLTqzmQOYFl5r5zyUNFdkXN0R8Tp8k+yR iXggn5D1VgT/yuqUcFDx =x09g -----END PGP SIGNATURE----- --0bm9DT2drH6HMC1Qo6kRTVUXibN9UJvo0-- --===============0463152021== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVs IG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg== --===============0463152021==--