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diff for duplicates of <56D58E88.2080700@arm.com>

diff --git a/a/1.txt b/N1/1.txt
index 5275547..6ff9a35 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,10 +1,10 @@
 Hi,
 
-On 01/03/16 11:18, Andreas F?rber wrote:
+On 01/03/16 11:18, Andreas Färber wrote:
 > Hi Andre,
 > 
 > Am 01.03.2016 um 12:01 schrieb Andre Przywara:
->> On 29/02/16 23:44, Andreas F?rber wrote:
+>> On 29/02/16 23:44, Andreas Färber wrote:
 >>> Add GICH and GICV resources for HYP mode - guess based on other vendors.
 >>
 >> Do you know if the firmware allows the kernel to be entered in EL2
@@ -23,7 +23,7 @@ On 01/03/16 11:18, Andreas F?rber wrote:
 
 The GIC is an integral part of the SoC, so this clearly belongs in there.
 
->>> Signed-off-by: Andreas F?rber <afaerber@suse.de>
+>>> Signed-off-by: Andreas Färber <afaerber-l3A5Bk7waGM@public.gmane.org>
 >>> ---
 >>>  arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 +++-
 
@@ -40,7 +40,7 @@ So something like meson-s905.dtsi or the like?
 >>> --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
 >>> +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
 >>> @@ -117,7 +117,9 @@
->>>  		gic: interrupt-controller at c4301000 {
+>>>  		gic: interrupt-controller@c4301000 {
 >>>  			compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
 >>
 >> I think "arm,gic-400" is the name to use here these days, especially for
@@ -90,4 +90,8 @@ Andre.
 >>>  			interrupt-controller;
 >>>  			interrupts = <GIC_PPI 9
 >>>  				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
->
+> 
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index c5c0b41..77e0072 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,19 +2,34 @@
  "ref\01456789465-2962-8-git-send-email-afaerber@suse.de\0"
  "ref\056D57673.8030702@arm.com\0"
  "ref\056D57A7F.5020806@suse.de\0"
- "From\0andre.przywara@arm.com (Andre Przywara)\0"
- "Subject\0[PATCH 7/8] ARM64: dts: amlogic: Extend GXBaby GIC node\0"
+ "ref\056D57A7F.5020806-l3A5Bk7waGM@public.gmane.org\0"
+ "From\0Andre Przywara <andre.przywara-5wv7dgnIgG8@public.gmane.org>\0"
+ "Subject\0Re: [PATCH 7/8] ARM64: dts: amlogic: Extend GXBaby GIC node\0"
  "Date\0Tue, 1 Mar 2016 12:43:52 +0000\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Andreas F\303\244rber <afaerber-l3A5Bk7waGM@public.gmane.org>"
+ " linux-meson-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org\0"
+ "Cc\0Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>"
+  devicetree <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
+  Matthias Brugger <mbrugger-IBi9RG/b67k@public.gmane.org>
+  Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>
+  Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>
+  Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>
+  Nicolas Saenz <nicolassaenzj-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+  Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
+  LKML <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
+  Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
+  Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
+  Carlo Caione <carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
+ " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0"
  "\00:1\0"
  "b\0"
  "Hi,\n"
  "\n"
- "On 01/03/16 11:18, Andreas F?rber wrote:\n"
+ "On 01/03/16 11:18, Andreas F\303\244rber wrote:\n"
  "> Hi Andre,\n"
  "> \n"
  "> Am 01.03.2016 um 12:01 schrieb Andre Przywara:\n"
- ">> On 29/02/16 23:44, Andreas F?rber wrote:\n"
+ ">> On 29/02/16 23:44, Andreas F\303\244rber wrote:\n"
  ">>> Add GICH and GICV resources for HYP mode - guess based on other vendors.\n"
  ">>\n"
  ">> Do you know if the firmware allows the kernel to be entered in EL2\n"
@@ -33,7 +48,7 @@
  "\n"
  "The GIC is an integral part of the SoC, so this clearly belongs in there.\n"
  "\n"
- ">>> Signed-off-by: Andreas F?rber <afaerber@suse.de>\n"
+ ">>> Signed-off-by: Andreas F\303\244rber <afaerber-l3A5Bk7waGM@public.gmane.org>\n"
  ">>> ---\n"
  ">>>  arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 +++-\n"
  "\n"
@@ -50,7 +65,7 @@
  ">>> --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi\n"
  ">>> +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi\n"
  ">>> @@ -117,7 +117,9 @@\n"
- ">>>  \t\tgic: interrupt-controller at c4301000 {\n"
+ ">>>  \t\tgic: interrupt-controller@c4301000 {\n"
  ">>>  \t\t\tcompatible = \"arm,cortex-a15-gic\", \"arm,cortex-a9-gic\";\n"
  ">>\n"
  ">> I think \"arm,gic-400\" is the name to use here these days, especially for\n"
@@ -100,6 +115,10 @@
  ">>>  \t\t\tinterrupt-controller;\n"
  ">>>  \t\t\tinterrupts = <GIC_PPI 9\n"
  ">>>  \t\t\t\t(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;\n"
- >
+ "> \n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
-fd9227d217a522f5ad14bfa857e557acdf73692ff407352d5321008b622ecb79
+aee7077197e17cd297bf80d942f0dcd544a17b2421dc9ba8a03c5f5449dc0e31

diff --git a/a/1.txt b/N2/1.txt
index 5275547..837591f 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -1,10 +1,10 @@
 Hi,
 
-On 01/03/16 11:18, Andreas F?rber wrote:
+On 01/03/16 11:18, Andreas Färber wrote:
 > Hi Andre,
 > 
 > Am 01.03.2016 um 12:01 schrieb Andre Przywara:
->> On 29/02/16 23:44, Andreas F?rber wrote:
+>> On 29/02/16 23:44, Andreas Färber wrote:
 >>> Add GICH and GICV resources for HYP mode - guess based on other vendors.
 >>
 >> Do you know if the firmware allows the kernel to be entered in EL2
@@ -23,7 +23,7 @@ On 01/03/16 11:18, Andreas F?rber wrote:
 
 The GIC is an integral part of the SoC, so this clearly belongs in there.
 
->>> Signed-off-by: Andreas F?rber <afaerber@suse.de>
+>>> Signed-off-by: Andreas Färber <afaerber@suse.de>
 >>> ---
 >>>  arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 +++-
 
@@ -40,7 +40,7 @@ So something like meson-s905.dtsi or the like?
 >>> --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
 >>> +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
 >>> @@ -117,7 +117,9 @@
->>>  		gic: interrupt-controller at c4301000 {
+>>>  		gic: interrupt-controller@c4301000 {
 >>>  			compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
 >>
 >> I think "arm,gic-400" is the name to use here these days, especially for
diff --git a/a/content_digest b/N2/content_digest
index c5c0b41..d6df258 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -2,19 +2,33 @@
  "ref\01456789465-2962-8-git-send-email-afaerber@suse.de\0"
  "ref\056D57673.8030702@arm.com\0"
  "ref\056D57A7F.5020806@suse.de\0"
- "From\0andre.przywara@arm.com (Andre Przywara)\0"
- "Subject\0[PATCH 7/8] ARM64: dts: amlogic: Extend GXBaby GIC node\0"
+ "From\0Andre Przywara <andre.przywara@arm.com>\0"
+ "Subject\0Re: [PATCH 7/8] ARM64: dts: amlogic: Extend GXBaby GIC node\0"
  "Date\0Tue, 1 Mar 2016 12:43:52 +0000\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Andreas F\303\244rber <afaerber@suse.de>"
+ " linux-meson@googlegroups.com\0"
+ "Cc\0Mark Rutland <mark.rutland@arm.com>"
+  devicetree <devicetree@vger.kernel.org>
+  Matthias Brugger <mbrugger@suse.com>
+  Pawel Moll <pawel.moll@arm.com>
+  Ian Campbell <ijc+devicetree@hellion.org.uk>
+  Catalin Marinas <catalin.marinas@arm.com>
+  Nicolas Saenz <nicolassaenzj@gmail.com>
+  Will Deacon <will.deacon@arm.com>
+  LKML <linux-kernel@vger.kernel.org>
+  Rob Herring <robh+dt@kernel.org>
+  Kumar Gala <galak@codeaurora.org>
+  Carlo Caione <carlo@caione.org>
+ " linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "Hi,\n"
  "\n"
- "On 01/03/16 11:18, Andreas F?rber wrote:\n"
+ "On 01/03/16 11:18, Andreas F\303\244rber wrote:\n"
  "> Hi Andre,\n"
  "> \n"
  "> Am 01.03.2016 um 12:01 schrieb Andre Przywara:\n"
- ">> On 29/02/16 23:44, Andreas F?rber wrote:\n"
+ ">> On 29/02/16 23:44, Andreas F\303\244rber wrote:\n"
  ">>> Add GICH and GICV resources for HYP mode - guess based on other vendors.\n"
  ">>\n"
  ">> Do you know if the firmware allows the kernel to be entered in EL2\n"
@@ -33,7 +47,7 @@
  "\n"
  "The GIC is an integral part of the SoC, so this clearly belongs in there.\n"
  "\n"
- ">>> Signed-off-by: Andreas F?rber <afaerber@suse.de>\n"
+ ">>> Signed-off-by: Andreas F\303\244rber <afaerber@suse.de>\n"
  ">>> ---\n"
  ">>>  arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 +++-\n"
  "\n"
@@ -50,7 +64,7 @@
  ">>> --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi\n"
  ">>> +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi\n"
  ">>> @@ -117,7 +117,9 @@\n"
- ">>>  \t\tgic: interrupt-controller at c4301000 {\n"
+ ">>>  \t\tgic: interrupt-controller@c4301000 {\n"
  ">>>  \t\t\tcompatible = \"arm,cortex-a15-gic\", \"arm,cortex-a9-gic\";\n"
  ">>\n"
  ">> I think \"arm,gic-400\" is the name to use here these days, especially for\n"
@@ -102,4 +116,4 @@
  ">>>  \t\t\t\t(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;\n"
  >
 
-fd9227d217a522f5ad14bfa857e557acdf73692ff407352d5321008b622ecb79
+480607c5a9a98be67dc92ea3e8e8b530efb7c6e23e7b80c20b6962c1b542bc09

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