diff for duplicates of <56D6DD2E.4030207@arm.com> diff --git a/a/1.txt b/N1/1.txt index 70e0eea..ba2a7bb 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -24,7 +24,7 @@ between the masters and the M4U, so input addresses are still 32 bits and we don't need extended tables, right? Furthermore, what about the TTBRs? Does the level 1 table still have to be below 4GB? -> Signed-off-by: Yong Wu <yong.wu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> +> Signed-off-by: Yong Wu <yong.wu@mediatek.com> > --- > In arm_v7s_init_pte, We add bit9 if the 4GB mode is enabled no matter > the current pa is over 4GB or not. diff --git a/a/content_digest b/N1/content_digest index 635c5ed..07eb2d4 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,28 +1,9 @@ "ref\01456268552-16635-1-git-send-email-yong.wu@mediatek.com\0" "ref\01456268552-16635-2-git-send-email-yong.wu@mediatek.com\0" - "ref\01456268552-16635-2-git-send-email-yong.wu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org\0" - "From\0Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>\0" - "Subject\0Re: [PATCH 1/2] iommu/io-pgtable: Add MTK 4GB mode in Short-descriptor\0" + "From\0robin.murphy@arm.com (Robin Murphy)\0" + "Subject\0[PATCH 1/2] iommu/io-pgtable: Add MTK 4GB mode in Short-descriptor\0" "Date\0Wed, 2 Mar 2016 12:31:42 +0000\0" - "To\0Yong Wu <yong.wu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>" - Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> - Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> - " Matthias Brugger <matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" - "Cc\0pebolle-IWqWACnzNjzz+pZb47iToQ@public.gmane.org" - arnd-r2nGTMty4D4@public.gmane.org - srv_heupstream-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org - Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org> - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - milton.chiang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org - Tomasz Figa <tfiga-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org> - iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org - Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> - Daniel Kurtz <djkurtz-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org> - Sasha Hauer <kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> - linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - youhua.li-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - " Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Hi Yong,\n" @@ -51,7 +32,7 @@ "and we don't need extended tables, right? Furthermore, what about the \n" "TTBRs? Does the level 1 table still have to be below 4GB?\n" "\n" - "> Signed-off-by: Yong Wu <yong.wu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>\n" + "> Signed-off-by: Yong Wu <yong.wu@mediatek.com>\n" "> ---\n" "> In arm_v7s_init_pte, We add bit9 if the 4GB mode is enabled no matter\n" "> the current pa is over 4GB or not.\n" @@ -143,4 +124,4 @@ "> \tunsigned int\t\t\tias;\n" > -4f9577274b29d6ba8f0d8c92405c5295b0bd652d177ff4418cfce74f1b7888fd +21b4a5700928e03517d001a92b16c86d5a13b3a5219a742589151881f23492d8
diff --git a/a/1.txt b/N2/1.txt index 70e0eea..ba2a7bb 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -24,7 +24,7 @@ between the masters and the M4U, so input addresses are still 32 bits and we don't need extended tables, right? Furthermore, what about the TTBRs? Does the level 1 table still have to be below 4GB? -> Signed-off-by: Yong Wu <yong.wu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org> +> Signed-off-by: Yong Wu <yong.wu@mediatek.com> > --- > In arm_v7s_init_pte, We add bit9 if the 4GB mode is enabled no matter > the current pa is over 4GB or not. diff --git a/a/content_digest b/N2/content_digest index 635c5ed..c1cdd06 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,28 +1,28 @@ "ref\01456268552-16635-1-git-send-email-yong.wu@mediatek.com\0" "ref\01456268552-16635-2-git-send-email-yong.wu@mediatek.com\0" - "ref\01456268552-16635-2-git-send-email-yong.wu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org\0" - "From\0Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>\0" + "From\0Robin Murphy <robin.murphy@arm.com>\0" "Subject\0Re: [PATCH 1/2] iommu/io-pgtable: Add MTK 4GB mode in Short-descriptor\0" "Date\0Wed, 2 Mar 2016 12:31:42 +0000\0" - "To\0Yong Wu <yong.wu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>" - Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org> - Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org> - " Matthias Brugger <matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" - "Cc\0pebolle-IWqWACnzNjzz+pZb47iToQ@public.gmane.org" - arnd-r2nGTMty4D4@public.gmane.org - srv_heupstream-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org - Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org> - linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - milton.chiang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org - Tomasz Figa <tfiga-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org> - iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org - Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> - Daniel Kurtz <djkurtz-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org> - Sasha Hauer <kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> - linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - youhua.li-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - " Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>\0" + "To\0Yong Wu <yong.wu@mediatek.com>" + Joerg Roedel <joro@8bytes.org> + Will Deacon <will.deacon@arm.com> + " Matthias Brugger <matthias.bgg@gmail.com>\0" + "Cc\0Daniel Kurtz <djkurtz@google.com>" + Tomasz Figa <tfiga@google.com> + Lucas Stach <l.stach@pengutronix.de> + Rob Herring <robh+dt@kernel.org> + Catalin Marinas <catalin.marinas@arm.com> + linux-mediatek@lists.infradead.org + Sasha Hauer <kernel@pengutronix.de> + srv_heupstream@mediatek.com + linux-kernel@vger.kernel.org + linux-arm-kernel@lists.infradead.org + iommu@lists.linux-foundation.org + pebolle@tiscali.nl + arnd@arndb.de + mitchelh@codeaurora.org + youhua.li@mediatek.com + " milton.chiang@mediatek.com\0" "\00:1\0" "b\0" "Hi Yong,\n" @@ -51,7 +51,7 @@ "and we don't need extended tables, right? Furthermore, what about the \n" "TTBRs? Does the level 1 table still have to be below 4GB?\n" "\n" - "> Signed-off-by: Yong Wu <yong.wu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>\n" + "> Signed-off-by: Yong Wu <yong.wu@mediatek.com>\n" "> ---\n" "> In arm_v7s_init_pte, We add bit9 if the 4GB mode is enabled no matter\n" "> the current pa is over 4GB or not.\n" @@ -143,4 +143,4 @@ "> \tunsigned int\t\t\tias;\n" > -4f9577274b29d6ba8f0d8c92405c5295b0bd652d177ff4418cfce74f1b7888fd +b162a6783bbb7b7a46cbc26393d622f70071f90304eda8f9f663979f6ef12169
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