From: Marcel Apfelbaum <marcel@redhat.com>
To: David Kiarie <davidkiarie4@gmail.com>, qemu-devel@nongnu.org
Cc: valentine.sinitsyn@gmail.com, jan.kiszka@web.de, mst@redhat.com
Subject: Re: [Qemu-devel] [V6 1/4] hw/i386: Introduce AMD IOMMU
Date: Thu, 3 Mar 2016 14:16:39 +0200 [thread overview]
Message-ID: <56D82B27.9070302@redhat.com> (raw)
In-Reply-To: <56D73ACA.8030109@gmail.com>
On 03/02/2016 09:11 PM, David Kiarie wrote:
>
>
> On 25/02/16 18:43, Marcel Apfelbaum wrote:
>> On 02/21/2016 08:10 PM, David Kiarie wrote:
>>> Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU
>>> The IOMMU does basic translation, error checking and has a
>>> mininal IOTLB implementation
>>
>> Hi,
>>
>>>
>>> Signed-off-by: David Kiarie <davidkiarie4@gmail.com>
>>> ---
>
[...]
>>> +
>>> +static void amd_iommu_realize(PCIDevice *dev, Error **error)
>>> +{
>>> + AMDIOMMUState *s = container_of(dev, AMDIOMMUState, dev);
>>> +
>>> + s->iotlb = g_hash_table_new_full(amd_iommu_uint64_hash,
>>> + amd_iommu_uint64_equal, g_free, g_free);
>>> +
>>> + s->capab_offset = pci_add_capability(dev, IOMMU_CAPAB_ID_SEC, 0,
>>> + IOMMU_CAPAB_SIZE);
>>> +
>>> + /* add msi and hypertransport capabilities */
>>> + pci_add_capability(&s->dev, PCI_CAP_ID_MSI, 0, IOMMU_CAPAB_REG_SIZE);
>>> + pci_add_capability(&s->dev, PCI_CAP_ID_HT, 0, IOMMU_CAPAB_REG_SIZE);
>>> +
>>> + amd_iommu_init(s);
>>> +
>>> + /* set up MMIO */
>>> + memory_region_init_io(&s->mmio, OBJECT(s), &mmio_mem_ops, s, "mmio",
>>> + IOMMU_MMIO_SIZE);
>>> +
>>> + if (s->mmio.addr == IOMMU_BASE_ADDR) {
>>
>> I don't understand why is need here. realize is called only once in the init process
>> and you set it a few lines below.
>>
>>> + return;
>>> + }
>>> +
>>> + s->mmio.addr = IOMMU_BASE_ADDR;
>>> + memory_region_add_subregion(get_system_memory(), IOMMU_BASE_ADDR, &s->mmio);
>>> +}
>>> +
>>> +static const VMStateDescription vmstate_amd_iommu = {
>>> + .name = "amd-iommu",
>>> + .fields = (VMStateField[]) {
>>> + VMSTATE_PCI_DEVICE(dev, AMDIOMMUState),
>>> + VMSTATE_END_OF_LIST()
>>> + }
>>> +};
>>> +
>>> +static Property amd_iommu_properties[] = {
>>> + DEFINE_PROP_UINT32("version", AMDIOMMUState, version, 2),
>>> + DEFINE_PROP_END_OF_LIST(),
>>> +};
>>> +
>>> +static void amd_iommu_uninit(PCIDevice *dev)
>>> +{
>>> + AMDIOMMUState *s = container_of(dev, AMDIOMMUState, dev);
>>> + amd_iommu_iotlb_reset(s);
>>
>> at this point you also need to clean also the memory regions you use.
>
> What exactly do you mean by clean up the memory regions ?
>
You have an memory_region_add_subregion on realize, you need
a memory_region_del_subregion on exit.
Thanks,
Marcel
>>
>>> +}
>>> +
>>> +static void amd_iommu_class_init(ObjectClass *klass, void* data)
>>> +{
>>> + DeviceClass *dc = DEVICE_CLASS(klass);
>>> + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
>>> +
>>> + k->realize = amd_iommu_realize;
>>> + k->exit = amd_iommu_uninit;
>>> +
>>> + dc->reset = amd_iommu_reset;
>>> + dc->vmsd = &vmstate_amd_iommu;
>>> + dc->props = amd_iommu_properties;
>>> +}
>>> +
>>> +static const TypeInfo amd_iommu = {
>>> + .name = TYPE_AMD_IOMMU_DEVICE,
>>> + .parent = TYPE_PCI_DEVICE,
>>> + .instance_size = sizeof(AMDIOMMUState),
>>> + .class_init = amd_iommu_class_init
>>> +};
>>> +
>>> +static void amd_iommu_register_types(void)
>>> +{
>>> + type_register_static(&amd_iommu);
>>> +}
>>> +
>>> +type_init(amd_iommu_register_types);
[...]
next prev parent reply other threads:[~2016-03-03 12:16 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-21 18:10 [Qemu-devel] [V6 0/4] AMD IOMMU David Kiarie
2016-02-21 18:10 ` [Qemu-devel] [V6 1/4] hw/i386: Introduce " David Kiarie
2016-02-25 15:43 ` Marcel Apfelbaum
2016-02-26 6:23 ` David Kiarie
2016-03-02 4:00 ` David Kiarie
2016-03-02 4:08 ` David Kiarie
2016-03-03 9:40 ` Marcel Apfelbaum
2016-03-03 9:34 ` Marcel Apfelbaum
2016-03-02 19:11 ` David Kiarie
2016-03-03 12:16 ` Marcel Apfelbaum [this message]
2016-02-21 18:10 ` [Qemu-devel] [V6 2/4] hw/core: Add AMD IOMMU to machine properties David Kiarie
2016-02-21 20:09 ` Jan Kiszka
2016-03-02 20:51 ` David Kiarie
2016-03-03 9:28 ` Marcel Apfelbaum
2016-03-11 13:20 ` Michael S. Tsirkin
2016-02-21 18:10 ` [Qemu-devel] [V6 3/4] hw/i386: ACPI table for AMD IOMMU David Kiarie
2016-02-21 18:20 ` Jan Kiszka
2016-02-21 19:00 ` David Kiarie
2016-02-21 18:11 ` [Qemu-devel] [V6 4/4] hw/pci-host: Emulate " David Kiarie
2016-02-22 11:22 ` Marcel Apfelbaum
[not found] ` <56D75688.1020500@gmail.com>
2016-03-02 21:17 ` Michael S. Tsirkin
2016-03-02 22:04 ` David Kiarie
2016-03-03 9:49 ` Michael S. Tsirkin
2016-03-03 11:47 ` David Kiarie
2016-03-03 12:02 ` Marcel Apfelbaum
2016-03-03 12:06 ` Marcel Apfelbaum
2016-03-03 12:18 ` David Kiarie
2016-03-03 12:58 ` Michael S. Tsirkin
2016-03-08 17:15 ` David Kiarie
2016-03-11 13:22 ` Michael S. Tsirkin
2016-03-13 0:14 ` David Kiarie
2016-03-13 13:59 ` Michael S. Tsirkin
2016-02-21 20:20 ` [Qemu-devel] [V6 0/4] " Jan Kiszka
2016-02-22 5:57 ` David Kiarie
2016-02-22 7:29 ` Jan Kiszka
2016-02-22 11:05 ` David Kiarie
2016-02-22 11:12 ` Jan Kiszka
2016-03-01 13:07 ` Michael S. Tsirkin
2016-03-01 13:48 ` Jan Kiszka
2016-03-01 13:55 ` Michael S. Tsirkin
2016-03-01 14:12 ` Jan Kiszka
2016-03-01 14:18 ` Jan Kiszka
2016-03-01 14:30 ` Michael S. Tsirkin
2016-03-01 14:35 ` Jan Kiszka
2016-03-01 14:19 ` Michael S. Tsirkin
2016-03-01 14:00 ` Jan Kiszka
2016-03-01 20:11 ` Michael S. Tsirkin
2016-03-01 20:17 ` Jan Kiszka
2016-03-01 20:39 ` Michael S. Tsirkin
2016-03-01 21:23 ` Jan Kiszka
2016-03-01 22:35 ` Michael S. Tsirkin
2016-03-02 21:17 ` David Kiarie
2016-03-02 21:32 ` Michael S. Tsirkin
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