From: Tirumalesh Chalamarla <tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
To: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
Geethasowjanya.Akula-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH V4] iommu/arm-smmu-v2: Workaround for ThunderX errata#27704
Date: Fri, 4 Mar 2016 10:16:44 -0800 [thread overview]
Message-ID: <56D9D10C.8050603@caviumnetworks.com> (raw)
In-Reply-To: <56D9CF3E.7080607-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
On 03/04/2016 10:09 AM, Tirumalesh Chalamarla wrote:
>
>
> On 03/04/2016 08:02 AM, Will Deacon wrote:
>> On Thu, Mar 03, 2016 at 07:44:03PM -0800, Tirumalesh Chalamarla wrote:
>>> Due to Errata#27704 CN88xx SMMUv2,supports only shared ASID and VMID
>>> namespaces; specifically within a given node SMMU0 and SMMU1 share,
>>> as does SMMU2 and SMMU3.
>>>
>>> This patch make sures ASID and VMID space is unique across cavium
>>> SMMUv2.
>>>
>>> changes from V3:
>>> - Removed redundent variable.
>>
>> [...]
>>
>>> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
>>> index 247a469..bfe38f3 100644
>>> --- a/drivers/iommu/arm-smmu.c
>>> +++ b/drivers/iommu/arm-smmu.c
>>> @@ -326,6 +326,11 @@ struct arm_smmu_device {
>>>
>>> struct list_head list;
>>> struct rb_root masters;
>>> + /*
>>> + *The following fields are specific to Cavium, Thunder
>>> + */
>>> + u32 cavium_id_base;
>>> +
>>> };
>>>
>>> struct arm_smmu_cfg {
>>> @@ -335,8 +340,8 @@ struct arm_smmu_cfg {
>>> };
>>> #define INVALID_IRPTNDX 0xff
>>>
>>> -#define ARM_SMMU_CB_ASID(cfg) ((cfg)->cbndx)
>>> -#define ARM_SMMU_CB_VMID(cfg) ((cfg)->cbndx + 1)
>>> +#define ARM_SMMU_CB_ASID(smmu, cfg) ((u16)(smmu)->cavium_id_base +
>>> (cfg)->cbndx)
>>> +#define ARM_SMMU_CB_VMID(smmu, cfg) ((u16)(smmu)->cavium_id_base +
>>> (cfg)->cbndx + 1)
>>>
>>> enum arm_smmu_domain_stage {
>>> ARM_SMMU_DOMAIN_S1 = 0,
>>> @@ -364,6 +369,8 @@ struct arm_smmu_option_prop {
>>> const char *prop;
>>> };
>>>
>>> +static u32 cavium_smmu_context_count;
>>
>> I thought you were going to make this an atomic_t?
> well i moved variable handling inside atomic context.
> with atomic_t i still needed 2 operations like read and add
> it seems atomic_add_return is not sufficient.
>
ignore this, will send with atomic_t if that feels more natural.
> in any case i thought why not use the atomic context that is already
> there. if you feel the use of atomic_t is more natural, i will resend
> again.
>
> Thanks,
> Tirumalesh.
>>
>> Will
>>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: tchalamarla@caviumnetworks.com (Tirumalesh Chalamarla)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V4] iommu/arm-smmu-v2: Workaround for ThunderX errata#27704
Date: Fri, 4 Mar 2016 10:16:44 -0800 [thread overview]
Message-ID: <56D9D10C.8050603@caviumnetworks.com> (raw)
In-Reply-To: <56D9CF3E.7080607@caviumnetworks.com>
On 03/04/2016 10:09 AM, Tirumalesh Chalamarla wrote:
>
>
> On 03/04/2016 08:02 AM, Will Deacon wrote:
>> On Thu, Mar 03, 2016 at 07:44:03PM -0800, Tirumalesh Chalamarla wrote:
>>> Due to Errata#27704 CN88xx SMMUv2,supports only shared ASID and VMID
>>> namespaces; specifically within a given node SMMU0 and SMMU1 share,
>>> as does SMMU2 and SMMU3.
>>>
>>> This patch make sures ASID and VMID space is unique across cavium
>>> SMMUv2.
>>>
>>> changes from V3:
>>> - Removed redundent variable.
>>
>> [...]
>>
>>> diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
>>> index 247a469..bfe38f3 100644
>>> --- a/drivers/iommu/arm-smmu.c
>>> +++ b/drivers/iommu/arm-smmu.c
>>> @@ -326,6 +326,11 @@ struct arm_smmu_device {
>>>
>>> struct list_head list;
>>> struct rb_root masters;
>>> + /*
>>> + *The following fields are specific to Cavium, Thunder
>>> + */
>>> + u32 cavium_id_base;
>>> +
>>> };
>>>
>>> struct arm_smmu_cfg {
>>> @@ -335,8 +340,8 @@ struct arm_smmu_cfg {
>>> };
>>> #define INVALID_IRPTNDX 0xff
>>>
>>> -#define ARM_SMMU_CB_ASID(cfg) ((cfg)->cbndx)
>>> -#define ARM_SMMU_CB_VMID(cfg) ((cfg)->cbndx + 1)
>>> +#define ARM_SMMU_CB_ASID(smmu, cfg) ((u16)(smmu)->cavium_id_base +
>>> (cfg)->cbndx)
>>> +#define ARM_SMMU_CB_VMID(smmu, cfg) ((u16)(smmu)->cavium_id_base +
>>> (cfg)->cbndx + 1)
>>>
>>> enum arm_smmu_domain_stage {
>>> ARM_SMMU_DOMAIN_S1 = 0,
>>> @@ -364,6 +369,8 @@ struct arm_smmu_option_prop {
>>> const char *prop;
>>> };
>>>
>>> +static u32 cavium_smmu_context_count;
>>
>> I thought you were going to make this an atomic_t?
> well i moved variable handling inside atomic context.
> with atomic_t i still needed 2 operations like read and add
> it seems atomic_add_return is not sufficient.
>
ignore this, will send with atomic_t if that feels more natural.
> in any case i thought why not use the atomic context that is already
> there. if you feel the use of atomic_t is more natural, i will resend
> again.
>
> Thanks,
> Tirumalesh.
>>
>> Will
>>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2016-03-04 18:16 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-04 3:44 [PATCH V4] iommu/arm-smmu-v2: Workaround for ThunderX errata#27704 Tirumalesh Chalamarla
2016-03-04 3:44 ` Tirumalesh Chalamarla
[not found] ` <1457063043-10623-1-git-send-email-tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2016-03-04 16:02 ` Will Deacon
2016-03-04 16:02 ` Will Deacon
[not found] ` <20160304160221.GC7886-5wv7dgnIgG8@public.gmane.org>
2016-03-04 18:09 ` Tirumalesh Chalamarla
2016-03-04 18:09 ` Tirumalesh Chalamarla
[not found] ` <56D9CF3E.7080607-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2016-03-04 18:16 ` Tirumalesh Chalamarla [this message]
2016-03-04 18:16 ` Tirumalesh Chalamarla
-- strict thread matches above, loose matches on Subject: below --
2016-03-04 18:39 Tirumalesh Chalamarla
2016-03-04 18:39 ` Tirumalesh Chalamarla
[not found] ` <1457116784-13287-1-git-send-email-tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2016-03-04 20:59 ` Will Deacon
2016-03-04 20:59 ` Will Deacon
[not found] ` <20160304205945.GG7886-5wv7dgnIgG8@public.gmane.org>
2016-03-04 21:35 ` Tirumalesh Chalamarla
2016-03-04 21:35 ` Tirumalesh Chalamarla
2016-03-04 21:56 Tirumalesh Chalamarla
2016-03-04 21:56 ` Tirumalesh Chalamarla
[not found] ` <1457128569-13878-1-git-send-email-tchalamarla-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2016-03-24 17:36 ` Chalamarla, Tirumalesh
2016-03-24 17:36 ` Chalamarla, Tirumalesh
[not found] ` <44D97D2C-5114-4FCD-AE3E-9404391FD449-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org>
2016-03-24 17:51 ` Will Deacon
2016-03-24 17:51 ` Will Deacon
[not found] ` <20160324175127.GA29365-5wv7dgnIgG8@public.gmane.org>
2016-03-24 18:29 ` Chalamarla, Tirumalesh
2016-03-24 18:29 ` Chalamarla, Tirumalesh
2016-03-28 18:57 ` Radha Mohan
2016-03-28 18:57 ` Radha Mohan
2016-03-28 19:25 ` Radha Mohan
2016-03-28 19:25 ` Radha Mohan
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