diff for duplicates of <56DEE6AE.100@opensource.altera.com> diff --git a/a/1.txt b/N1/1.txt index 111ee46..c5827fc 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,6 +1,6 @@ -On 03/07/2016 01:43 PM, tthayer at opensource.altera.com wrote: +On 03/07/2016 01:43 PM, tthayer@opensource.altera.com wrote: > From: Thor Thayer <tthayer@opensource.altera.com> > > Add the device tree entries needed to support the Altera L2 @@ -8,7 +8,7 @@ On 03/07/2016 01:43 PM, tthayer at opensource.altera.com wrote: > > Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> > --- -> v2 Match register value (l2-ecc at ffd06010) +> v2 Match register value (l2-ecc@ffd06010) > --- > arch/arm/boot/dts/socfpga_arria10.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) @@ -21,13 +21,13 @@ On 03/07/2016 01:43 PM, tthayer at opensource.altera.com wrote: > reg = <0xffe00000 0x40000>; > }; > -> + eccmgr: eccmgr at ffd06090 { +> + eccmgr: eccmgr@ffd06090 { > + compatible = "altr,socfpga-ecc-manager"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + -> + l2-ecc at ffd06010 { +> + l2-ecc@ffd06010 { > + compatible = "altr,socfpga-a10-l2-ecc"; > + reg = <0xffd06010 0x4>; > + interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>, diff --git a/a/content_digest b/N1/content_digest index 7a20326..9869ee9 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,14 +1,30 @@ "ref\01457379787-8327-1-git-send-email-tthayer@opensource.altera.com\0" "ref\01457379787-8327-12-git-send-email-tthayer@opensource.altera.com\0" - "From\0dinguyen@opensource.altera.com (Dinh Nguyen)\0" - "Subject\0[PATCHv2 11/11] ARM: dts: Add Altera Arria10 L2 Cache EDAC devicetree entry\0" + "From\0Dinh Nguyen <dinguyen@opensource.altera.com>\0" + "Subject\0Re: [PATCHv2 11/11] ARM: dts: Add Altera Arria10 L2 Cache EDAC devicetree entry\0" "Date\0Tue, 8 Mar 2016 08:50:22 -0600\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0tthayer@opensource.altera.com" + bp@alien8.de + dougthompson@xmission.com + m.chehab@samsung.com + robh+dt@kernel.org + pawel.moll@arm.com + mark.rutland@arm.com + ijc+devicetree@hellion.org.uk + galak@codeaurora.org + linux@arm.linux.org.uk + " grant.likely@linaro.org\0" + "Cc\0devicetree@vger.kernel.org" + linux-doc@vger.kernel.org + linux-edac@vger.kernel.org + linux-kernel@vger.kernel.org + linux-arm-kernel@lists.infradead.org + " tthayer.linux@gmail.com\0" "\00:1\0" "b\0" "\n" "\n" - "On 03/07/2016 01:43 PM, tthayer at opensource.altera.com wrote:\n" + "On 03/07/2016 01:43 PM, tthayer@opensource.altera.com wrote:\n" "> From: Thor Thayer <tthayer@opensource.altera.com>\n" "> \n" "> Add the device tree entries needed to support the Altera L2\n" @@ -16,7 +32,7 @@ "> \n" "> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>\n" "> ---\n" - "> v2 Match register value (l2-ecc at ffd06010)\n" + "> v2 Match register value (l2-ecc@ffd06010)\n" "> ---\n" "> arch/arm/boot/dts/socfpga_arria10.dtsi | 14 ++++++++++++++\n" "> 1 file changed, 14 insertions(+)\n" @@ -29,13 +45,13 @@ "> \t\t\treg = <0xffe00000 0x40000>;\n" "> \t\t};\n" "> \n" - "> +\t\teccmgr: eccmgr at ffd06090 {\n" + "> +\t\teccmgr: eccmgr@ffd06090 {\n" "> +\t\t\tcompatible = \"altr,socfpga-ecc-manager\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <1>;\n" "> +\t\t\tranges;\n" "> +\n" - "> +\t\t\tl2-ecc at ffd06010 {\n" + "> +\t\t\tl2-ecc@ffd06010 {\n" "> +\t\t\t\tcompatible = \"altr,socfpga-a10-l2-ecc\";\n" "> +\t\t\t\treg = <0xffd06010 0x4>;\n" "> +\t\t\t\tinterrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -50,4 +66,4 @@ "\n" Dinh -1158690a01b7b65fa164385b45b007e8f1b816477beb202d705a997f4df90827 +a49963ed5327952cc0be45c58742ece34587814bf025329bbb4d01abcaa44dd7
diff --git a/a/1.txt b/N2/1.txt index 111ee46..c5827fc 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,6 +1,6 @@ -On 03/07/2016 01:43 PM, tthayer at opensource.altera.com wrote: +On 03/07/2016 01:43 PM, tthayer@opensource.altera.com wrote: > From: Thor Thayer <tthayer@opensource.altera.com> > > Add the device tree entries needed to support the Altera L2 @@ -8,7 +8,7 @@ On 03/07/2016 01:43 PM, tthayer at opensource.altera.com wrote: > > Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> > --- -> v2 Match register value (l2-ecc at ffd06010) +> v2 Match register value (l2-ecc@ffd06010) > --- > arch/arm/boot/dts/socfpga_arria10.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) @@ -21,13 +21,13 @@ On 03/07/2016 01:43 PM, tthayer at opensource.altera.com wrote: > reg = <0xffe00000 0x40000>; > }; > -> + eccmgr: eccmgr at ffd06090 { +> + eccmgr: eccmgr@ffd06090 { > + compatible = "altr,socfpga-ecc-manager"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + -> + l2-ecc at ffd06010 { +> + l2-ecc@ffd06010 { > + compatible = "altr,socfpga-a10-l2-ecc"; > + reg = <0xffd06010 0x4>; > + interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>, diff --git a/a/content_digest b/N2/content_digest index 7a20326..116182c 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,14 +1,30 @@ "ref\01457379787-8327-1-git-send-email-tthayer@opensource.altera.com\0" "ref\01457379787-8327-12-git-send-email-tthayer@opensource.altera.com\0" - "From\0dinguyen@opensource.altera.com (Dinh Nguyen)\0" - "Subject\0[PATCHv2 11/11] ARM: dts: Add Altera Arria10 L2 Cache EDAC devicetree entry\0" + "From\0Dinh Nguyen <dinguyen@opensource.altera.com>\0" + "Subject\0Re: [PATCHv2 11/11] ARM: dts: Add Altera Arria10 L2 Cache EDAC devicetree entry\0" "Date\0Tue, 8 Mar 2016 08:50:22 -0600\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0<tthayer@opensource.altera.com>" + <bp@alien8.de> + <dougthompson@xmission.com> + <m.chehab@samsung.com> + <robh+dt@kernel.org> + <pawel.moll@arm.com> + <mark.rutland@arm.com> + <ijc+devicetree@hellion.org.uk> + <galak@codeaurora.org> + <linux@arm.linux.org.uk> + " <grant.likely@linaro.org>\0" + "Cc\0<devicetree@vger.kernel.org>" + <linux-doc@vger.kernel.org> + <linux-edac@vger.kernel.org> + <linux-kernel@vger.kernel.org> + <linux-arm-kernel@lists.infradead.org> + " <tthayer.linux@gmail.com>\0" "\00:1\0" "b\0" "\n" "\n" - "On 03/07/2016 01:43 PM, tthayer at opensource.altera.com wrote:\n" + "On 03/07/2016 01:43 PM, tthayer@opensource.altera.com wrote:\n" "> From: Thor Thayer <tthayer@opensource.altera.com>\n" "> \n" "> Add the device tree entries needed to support the Altera L2\n" @@ -16,7 +32,7 @@ "> \n" "> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>\n" "> ---\n" - "> v2 Match register value (l2-ecc at ffd06010)\n" + "> v2 Match register value (l2-ecc@ffd06010)\n" "> ---\n" "> arch/arm/boot/dts/socfpga_arria10.dtsi | 14 ++++++++++++++\n" "> 1 file changed, 14 insertions(+)\n" @@ -29,13 +45,13 @@ "> \t\t\treg = <0xffe00000 0x40000>;\n" "> \t\t};\n" "> \n" - "> +\t\teccmgr: eccmgr at ffd06090 {\n" + "> +\t\teccmgr: eccmgr@ffd06090 {\n" "> +\t\t\tcompatible = \"altr,socfpga-ecc-manager\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <1>;\n" "> +\t\t\tranges;\n" "> +\n" - "> +\t\t\tl2-ecc at ffd06010 {\n" + "> +\t\t\tl2-ecc@ffd06010 {\n" "> +\t\t\t\tcompatible = \"altr,socfpga-a10-l2-ecc\";\n" "> +\t\t\t\treg = <0xffd06010 0x4>;\n" "> +\t\t\t\tinterrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -50,4 +66,4 @@ "\n" Dinh -1158690a01b7b65fa164385b45b007e8f1b816477beb202d705a997f4df90827 +8b2d5735de49be85d17e5ca36d108f4e470e7d2dd86a73642aaa52bcc6d2efa1
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