From: Dave Hansen <dave.hansen@intel.com>
To: Fenghua Yu <fenghua.yu@intel.com>,
"H. Peter Anvin" <hpa@linux.intel.com>,
Ingo Molnar <mingo@elte.hu>, Thomas Gleixner <tglx@linutronix.de>,
Ravi V Shankar <ravi.v.shankar@intel.com>
Cc: linux-kernel <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>
Subject: Re: [PATCH v2] x86/cpufeatures.h: Enumerate A Few New AVX-512 Features
Date: Thu, 10 Mar 2016 13:35:29 -0800 [thread overview]
Message-ID: <56E1E8A1.5040105@intel.com> (raw)
In-Reply-To: <1457655828-35106-1-git-send-email-fenghua.yu@intel.com>
On 03/10/2016 04:23 PM, Fenghua Yu wrote:
> A few new AVX-512 instruction groups/features are added in cpufeatures.h
> for enuermation: AVX512DQ, AVX512BW, and AVX512VL.
>
> The specification for latest AVX-512 including the features can be found at
> https://software.intel.com/sites/default/files/managed/07/b7/319433-023.pdf
Do we need to add these to fpu__xstate_clear_all_cpu_caps()?
next prev parent reply other threads:[~2016-03-10 21:35 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-11 0:23 [PATCH v2] x86/cpufeatures.h: Enumerate A Few New AVX-512 Features Fenghua Yu
2016-03-10 21:35 ` Dave Hansen [this message]
2016-03-10 23:18 ` H. Peter Anvin
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