From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38362) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1agFFU-00084a-OZ for qemu-devel@nongnu.org; Wed, 16 Mar 2016 13:28:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1agFFR-0004pr-Hz for qemu-devel@nongnu.org; Wed, 16 Mar 2016 13:28:44 -0400 References: <1458134034-32500-1-git-send-email-clg@fr.ibm.com> <1458134034-32500-4-git-send-email-clg@fr.ibm.com> From: Thomas Huth Message-ID: <56E997C5.8060500@redhat.com> Date: Wed, 16 Mar 2016 18:28:37 +0100 MIME-Version: 1.0 In-Reply-To: <1458134034-32500-4-git-send-email-clg@fr.ibm.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v2 03/10] ppc: Add a bunch of hypervisor SPRs to Book3s List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= , David Gibson Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org On 16.03.2016 14:13, C=C3=A9dric Le Goater wrote: > From: Benjamin Herrenschmidt >=20 > We don't give them a KVM reg number to most of the registers yet as no > current KVM version supports HV mode. For DAWR and DAWRX, the KVM reg > number is needed since this register can be set by the guest via the > H_SET_MODE hypercall. >=20 > Signed-off-by: Benjamin Herrenschmidt > [clg: squashed in patch 'ppc: Add KVM numbers to some P8 SPRs' > changed the commit log with a proposal of Thomas Huth > removed all hunks except those related to AMOR and DAWR* ] > Signed-off-by: C=C3=A9dric Le Goater > --- > target-ppc/translate_init.c | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) >=20 > diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c > index 6a11b41206e5..4cb3dd5076c1 100644 > --- a/target-ppc/translate_init.c > +++ b/target-ppc/translate_init.c > @@ -1105,6 +1105,11 @@ static void gen_spr_amr (CPUPPCState *env) > SPR_NOACCESS, SPR_NOACCESS, > &spr_read_generic, &spr_write_generic, > KVM_REG_PPC_UAMOR, 0); > + spr_register_hv(env, SPR_AMOR, "AMOR", > + SPR_NOACCESS, SPR_NOACCESS, > + SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, &spr_write_generic, > + 0); > #endif /* !CONFIG_USER_ONLY */ > } > #endif /* TARGET_PPC64 */ > @@ -7491,6 +7496,20 @@ static void gen_spr_book3s_dbg(CPUPPCState *env) > KVM_REG_PPC_DABRX, 0x00000000); > } > =20 > +static void gen_spr_book3s_207_dbg(CPUPPCState *env) > +{ > + spr_register_kvm_hv(env, SPR_DAWR, "DAWR", > + SPR_NOACCESS, SPR_NOACCESS, > + SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, &spr_write_generic, > + KVM_REG_PPC_DAWR, 0x00000000); > + spr_register_kvm_hv(env, SPR_DAWRX, "DAWRX", > + SPR_NOACCESS, SPR_NOACCESS, > + SPR_NOACCESS, SPR_NOACCESS, > + &spr_read_generic, &spr_write_generic, > + KVM_REG_PPC_DAWRX, 0x00000000); > +} > + > static void gen_spr_970_dbg(CPUPPCState *env) > { > /* Breakpoints */ > @@ -7960,6 +7979,8 @@ static void init_proc_book3s_64(CPUPPCState *env,= int version) > } > if (version < BOOK3S_CPU_POWER8) { > gen_spr_book3s_dbg(env); > + } else { > + gen_spr_book3s_207_dbg(env); > } > #if !defined(CONFIG_USER_ONLY) > switch (version) { Reviewed-by: Thomas Huth