From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57949) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aiN0x-0008PA-On for qemu-devel@nongnu.org; Tue, 22 Mar 2016 10:10:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aiN0t-0004at-KS for qemu-devel@nongnu.org; Tue, 22 Mar 2016 10:10:31 -0400 Received: from e06smtp11.uk.ibm.com ([195.75.94.107]:49778) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aiN0t-0004ak-8W for qemu-devel@nongnu.org; Tue, 22 Mar 2016 10:10:27 -0400 Received: from localhost by e06smtp11.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 22 Mar 2016 14:10:24 -0000 References: <1458564760-31993-1-git-send-email-clg@fr.ibm.com> <1458564760-31993-11-git-send-email-clg@fr.ibm.com> <56F14F09.3020302@redhat.com> From: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= Message-ID: <56F150A8.8080300@fr.ibm.com> Date: Tue, 22 Mar 2016 15:03:20 +0100 MIME-Version: 1.0 In-Reply-To: <56F14F09.3020302@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v3 10/10] ppc: A couple more dummy POWER8 Book4 regs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Thomas Huth , David Gibson Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org On 03/22/2016 02:56 PM, Thomas Huth wrote: > On 21.03.2016 13:52, Cédric Le Goater wrote: >> From: Benjamin Herrenschmidt >> >> Signed-off-by: Benjamin Herrenschmidt >> [clg: squashed in patch 'ppc: Add dummy ACOP SPR' ] >> Signed-off-by: Cédric Le Goater >> Reviewed-by: Thomas Huth >> Reviewed-by: David Gibson >> --- >> target-ppc/cpu.h | 3 +++ >> target-ppc/translate_init.c | 12 ++++++++++++ >> 2 files changed, 15 insertions(+) >> >> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h >> index 29c48600d950..676081e69dc0 100644 >> --- a/target-ppc/cpu.h >> +++ b/target-ppc/cpu.h >> @@ -1355,7 +1355,9 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) >> #define SPR_SRR1 (0x01B) >> #define SPR_CFAR (0x01C) >> #define SPR_AMR (0x01D) >> +#define SPR_ACOP (0x01F) >> #define SPR_BOOKE_PID (0x030) >> +#define SPR_BOOKS_PID (0x030) >> #define SPR_BOOKE_DECAR (0x036) >> #define SPR_BOOKE_CSRR0 (0x03A) >> #define SPR_BOOKE_CSRR1 (0x03B) >> @@ -1706,6 +1708,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) >> #define SPR_POWER_SPMC1 (0x37C) >> #define SPR_POWER_SPMC2 (0x37D) >> #define SPR_POWER_MMCRS (0x37E) >> +#define SPR_WORT (0x37F) >> #define SPR_PPR (0x380) >> #define SPR_750_GQR0 (0x390) >> #define SPR_440_DNV0 (0x390) >> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c >> index 5f53098faef7..51e8058c468e 100644 >> --- a/target-ppc/translate_init.c >> +++ b/target-ppc/translate_init.c >> @@ -8018,6 +8018,18 @@ static void gen_spr_power8_ic(CPUPPCState *env) >> &spr_read_generic, SPR_NOACCESS, >> &spr_read_generic, &spr_write_generic, >> 0); >> + spr_register_kvm(env, SPR_ACOP, "ACOP", >> + SPR_NOACCESS, SPR_NOACCESS, >> + &spr_read_generic, &spr_write_generic, >> + KVM_REG_PPC_ACOP, 0); >> + spr_register_kvm(env, SPR_BOOKS_PID, "PID", >> + SPR_NOACCESS, SPR_NOACCESS, >> + &spr_read_generic, &spr_write_generic, >> + KVM_REG_PPC_PID, 0); >> + spr_register_kvm(env, SPR_WORT, "WORT", >> + SPR_NOACCESS, SPR_NOACCESS, >> + &spr_read_generic, &spr_write_generic, >> + KVM_REG_PPC_WORT, 0); >> #endif >> } > > In the original patch, the registers had been added to a function called > gen_spr_power8_book4() ... now they are added to gen_spr_power8_ic() ... > was that on purpose or rather by accident? This is an accident which occurred when I removed SPR_MPPR. I will send a fix. Thanks, C.