diff for duplicates of <56F4EDB4.80207@huawei.com> diff --git a/a/1.txt b/N1/1.txt index e7acb41..893f628 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -65,7 +65,7 @@ On 2016/3/8 10:20, Jiancheng Xue wrote: > +bit index in the register. > + > +Example: CRG nodes -> +CRG: clock-reset-controller@12010000 { +> +CRG: clock-reset-controller at 12010000 { > + compatible = "hisilicon,hi3519-crg"; > + reg = <0x12010000 0x10000>; > + #clock-cells = <1>; @@ -73,7 +73,7 @@ On 2016/3/8 10:20, Jiancheng Xue wrote: > +}; > + > +Example: consumer nodes -> +i2c0: i2c@12110000 { +> +i2c0: i2c at 12110000 { > + compatible = "hisilicon,hi3519-i2c"; > + reg = <0x12110000 0x1000>; > + clocks = <&CRG HI3519_I2C0_RST>; diff --git a/a/content_digest b/N1/content_digest index df0f4e7..b30321d 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,37 +1,9 @@ "ref\01457403618-18317-1-git-send-email-xuejiancheng@huawei.com\0" "ref\01457403618-18317-3-git-send-email-xuejiancheng@huawei.com\0" - "From\0Jiancheng Xue <xuejiancheng@huawei.com>\0" - "Subject\0Re: [PATCH v10 2/6] clk: hisilicon: add CRG driver for hi3519 soc\0" + "From\0xuejiancheng@huawei.com (Jiancheng Xue)\0" + "Subject\0[PATCH v10 2/6] clk: hisilicon: add CRG driver for hi3519 soc\0" "Date\0Fri, 25 Mar 2016 15:50:12 +0800\0" - "To\0<sboyd@codeaurora.org>\0" - "Cc\0<mturquette@baylibre.com>" - <p.zabel@pengutronix.de> - <robh+dt@kernel.org> - <pawel.moll@arm.com> - <mark.rutland@arm.com> - <ijc+devicetree@hellion.org.uk> - <galak@codeaurora.org> - <linux@arm.linux.org.uk> - <khilman@linaro.org> - <arnd@arndb.de> - <olof@lixom.net> - <xuwei5@hisilicon.com> - <haojian.zhuang@linaro.org> - <zhangfei.gao@linaro.org> - <bintian.wang@huawei.com> - <linux-kernel@vger.kernel.org> - <linux-clk@vger.kernel.org> - <devicetree@vger.kernel.org> - <linux-arm-kernel@lists.infradead.org> - <yanhaifeng@hisilicon.com> - <yanghongwei@hisilicon.com> - <suwenping@hisilicon.com> - <raojun@hisilicon.com> - <ml.yang@hisilicon.com> - <gaofei@hisilicon.com> - <zhangzhenxing@hisilicon.com> - <xuejiancheng@hisilicon.com> - " <lidongpo@hisilicon.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Hi Stephen,\n" @@ -101,7 +73,7 @@ "> +bit index in the register.\n" "> +\n" "> +Example: CRG nodes\n" - "> +CRG: clock-reset-controller@12010000 {\n" + "> +CRG: clock-reset-controller at 12010000 {\n" "> +\tcompatible = \"hisilicon,hi3519-crg\";\n" "> +\treg = <0x12010000 0x10000>;\n" "> +\t#clock-cells = <1>;\n" @@ -109,7 +81,7 @@ "> +};\n" "> +\n" "> +Example: consumer nodes\n" - "> +i2c0: i2c@12110000 {\n" + "> +i2c0: i2c at 12110000 {\n" "> +\tcompatible = \"hisilicon,hi3519-i2c\";\n" "> +\treg = <0x12110000 0x1000>;\n" "> +\tclocks = <&CRG HI3519_I2C0_RST>;\n" @@ -508,4 +480,4 @@ "> +#endif\t/* __DTS_HI3519_CLOCK_H */\n" > -16e70efe23f9c46de13ed874118171710e63a81aec8d51b9ce38b9edcca8caca +391665a73f17ce86b1e56be2ffab70add34e412e7efd9c3faff48b5566fb1b8c
diff --git a/a/1.txt b/N2/1.txt index e7acb41..2789e4b 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -9,9 +9,9 @@ On 2016/3/8 10:20, Jiancheng Xue wrote: > The CRG(Clock and Reset Generator) block provides clock > and reset signals for other modules in hi3519 soc. > -> Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com> -> Acked-by: Rob Herring <robh@kernel.org> -> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> +> Signed-off-by: Jiancheng Xue <xuejiancheng-hv44wF8Li93QT0dZR+AlfA@public.gmane.org> +> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> +> Acked-by: Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> > --- > .../devicetree/bindings/clock/hi3519-crg.txt | 46 ++++++++ > drivers/clk/hisilicon/Kconfig | 15 +++ @@ -470,4 +470,9 @@ On 2016/3/8 10:20, Jiancheng Xue wrote: > +#define HI3519_USB3_CLK 18 > + > +#endif /* __DTS_HI3519_CLOCK_H */ -> +> + +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N2/content_digest index df0f4e7..7d50bf8 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,37 +1,38 @@ "ref\01457403618-18317-1-git-send-email-xuejiancheng@huawei.com\0" "ref\01457403618-18317-3-git-send-email-xuejiancheng@huawei.com\0" - "From\0Jiancheng Xue <xuejiancheng@huawei.com>\0" + "ref\01457403618-18317-3-git-send-email-xuejiancheng-hv44wF8Li93QT0dZR+AlfA@public.gmane.org\0" + "From\0Jiancheng Xue <xuejiancheng-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>\0" "Subject\0Re: [PATCH v10 2/6] clk: hisilicon: add CRG driver for hi3519 soc\0" "Date\0Fri, 25 Mar 2016 15:50:12 +0800\0" - "To\0<sboyd@codeaurora.org>\0" - "Cc\0<mturquette@baylibre.com>" - <p.zabel@pengutronix.de> - <robh+dt@kernel.org> - <pawel.moll@arm.com> - <mark.rutland@arm.com> - <ijc+devicetree@hellion.org.uk> - <galak@codeaurora.org> - <linux@arm.linux.org.uk> - <khilman@linaro.org> - <arnd@arndb.de> - <olof@lixom.net> - <xuwei5@hisilicon.com> - <haojian.zhuang@linaro.org> - <zhangfei.gao@linaro.org> - <bintian.wang@huawei.com> - <linux-kernel@vger.kernel.org> - <linux-clk@vger.kernel.org> - <devicetree@vger.kernel.org> - <linux-arm-kernel@lists.infradead.org> - <yanhaifeng@hisilicon.com> - <yanghongwei@hisilicon.com> - <suwenping@hisilicon.com> - <raojun@hisilicon.com> - <ml.yang@hisilicon.com> - <gaofei@hisilicon.com> - <zhangzhenxing@hisilicon.com> - <xuejiancheng@hisilicon.com> - " <lidongpo@hisilicon.com>\0" + "To\0sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org\0" + "Cc\0mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org" + p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org + robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org + pawel.moll-5wv7dgnIgG8@public.gmane.org + mark.rutland-5wv7dgnIgG8@public.gmane.org + ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org + galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org + linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org + khilman-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org + arnd-r2nGTMty4D4@public.gmane.org + olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org + xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org + haojian.zhuang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org + zhangfei.gao-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org + bintian.wang-hv44wF8Li93QT0dZR+AlfA@public.gmane.org + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + yanhaifeng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org + yanghongwei-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org + suwenping-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org + raojun-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org + ml.yang-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org + gaofei-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org + zhangzhenxing-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org + xuejiancheng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org + " lidongpo-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org\0" "\00:1\0" "b\0" "Hi Stephen,\n" @@ -45,9 +46,9 @@ "> The CRG(Clock and Reset Generator) block provides clock\n" "> and reset signals for other modules in hi3519 soc.\n" "> \n" - "> Signed-off-by: Jiancheng Xue <xuejiancheng@huawei.com>\n" - "> Acked-by: Rob Herring <robh@kernel.org>\n" - "> Acked-by: Philipp Zabel <p.zabel@pengutronix.de>\n" + "> Signed-off-by: Jiancheng Xue <xuejiancheng-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>\n" + "> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\n" + "> Acked-by: Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>\n" "> ---\n" "> .../devicetree/bindings/clock/hi3519-crg.txt | 46 ++++++++\n" "> drivers/clk/hisilicon/Kconfig | 15 +++\n" @@ -506,6 +507,11 @@ "> +#define HI3519_USB3_CLK\t\t\t18\n" "> +\n" "> +#endif\t/* __DTS_HI3519_CLOCK_H */\n" - > + "> \n" + "\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -16e70efe23f9c46de13ed874118171710e63a81aec8d51b9ce38b9edcca8caca +7d3b255757809ad314de54f4ad64720feb72e41336ecd37a5ca9bdde531a10a3
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