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[50.194.63.110]) by smtp.googlemail.com with ESMTPSA id b67sm12526833qhd.11.2016.03.28.14.49.43 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 28 Mar 2016 14:49:45 -0700 (PDT) To: Aleksandar Markovic , qemu-devel@nongnu.org References: <1458910214-12239-1-git-send-email-aleksandar.markovic@rt-rk.com> <1458910214-12239-3-git-send-email-aleksandar.markovic@rt-rk.com> From: Richard Henderson Message-ID: <56F9A6F5.2050504@twiddle.net> Date: Mon, 28 Mar 2016 14:49:41 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <1458910214-12239-3-git-send-email-aleksandar.markovic@rt-rk.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400d:c04::241 Cc: peter.maydell@linaro.org, ehabkost@redhat.com, kbastian@mail.uni-paderborn.de, mark.cave-ayland@ilande.co.uk, agraf@suse.de, petar.jovanovic@imgtec.com, blauwirbel@gmail.com, jcmvbkbc@gmail.com, miodrag.dinic@imgtec.com, qemu-arm@nongnu.org, qemu-ppc@nongnu.org, pbonzini@redhat.com, gxt@mprc.pku.edu.cn, leon.alrae@imgtec.com, afaerber@suse.de, aurelien@aurel32.net, proljc@gmail.com Subject: Re: [Qemu-arm] [PATCH 2/2] target-mips: Implement IEEE 754-2008 functionality for R6 and MSA instructions X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org Sender: qemu-arm-bounces+alex.bennee=linaro.org@nongnu.org X-TUID: TuePuVJ1267q On 03/25/2016 05:50 AM, Aleksandar Markovic wrote: > @@ -2621,9 +2621,23 @@ uint64_t helper_float_cvtl_d(CPUMIPSState *env, uint64_t fdt0) > uint64_t dt2; > > dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status); > - if (get_float_exception_flags(&env->active_fpu.fp_status) > - & (float_flag_invalid | float_flag_overflow)) { > - dt2 = FP_TO_INT64_OVERFLOW; > + if (env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) { > + if (get_float_exception_flags(&env->active_fpu.fp_status) > + & (float_flag_invalid | float_flag_overflow)) { > + if (float64_is_any_nan(fdt0)) { > + dt2 = 0; > + } else { > + if (float64_is_neg(fdt0)) > + dt2 = INT64_MIN; > + else > + dt2 = INT64_MAX; > + } > + } > + } else { > + if (get_float_exception_flags(&env->active_fpu.fp_status) > + & (float_flag_invalid | float_flag_overflow)) { > + dt2 = FP_TO_INT64_OVERFLOW; > + } Better to swap the tests here, so that you test the exception flags first (and once). That is the exceptional condition, the one that will be true least often. After that, FCR31_NAN2008 will be tested only when needed. But also, this pattern is replicated so many times you'd do well to pull this sequence out to helper functions (one for s, one for d). > +uint64_t helper_float_abs_d(CPUMIPSState *env, uint64_t fdt0) > +{ > + uint64_t fdt1; > + > + if (env->active_fpu.fcr31 & (1 << FCR31_ABS2008)) { > + fdt1 = float64_abs(fdt0); > + } else { > + if (float64_is_neg(fdt0)) { > + fdt1 = float64_sub(0, fdt0, &env->active_fpu.fp_status); > + } else { > + fdt1 = float64_add(0, fdt0, &env->active_fpu.fp_status); > + } > + update_fcr31(env, GETPC()); Here you're better off using two separate helper functions, and chose the correct one during translation. Indeed, since the 2008 version is a simple bit-flip, you needn't actually have a helper; just expand the sequence inline. r~ From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40726) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1akf2q-0006Wy-4p for qemu-devel@nongnu.org; Mon, 28 Mar 2016 17:49:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1akf2p-0004VO-Bh for qemu-devel@nongnu.org; Mon, 28 Mar 2016 17:49:56 -0400 Sender: Richard Henderson References: <1458910214-12239-1-git-send-email-aleksandar.markovic@rt-rk.com> <1458910214-12239-3-git-send-email-aleksandar.markovic@rt-rk.com> From: Richard Henderson Message-ID: <56F9A6F5.2050504@twiddle.net> Date: Mon, 28 Mar 2016 14:49:41 -0700 MIME-Version: 1.0 In-Reply-To: <1458910214-12239-3-git-send-email-aleksandar.markovic@rt-rk.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 2/2] target-mips: Implement IEEE 754-2008 functionality for R6 and MSA instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aleksandar Markovic , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, ehabkost@redhat.com, kbastian@mail.uni-paderborn.de, mark.cave-ayland@ilande.co.uk, agraf@suse.de, petar.jovanovic@imgtec.com, blauwirbel@gmail.com, jcmvbkbc@gmail.com, miodrag.dinic@imgtec.com, qemu-arm@nongnu.org, qemu-ppc@nongnu.org, edgar.iglesias@gmail.com, pbonzini@redhat.com, gxt@mprc.pku.edu.cn, leon.alrae@imgtec.com, afaerber@suse.de, aurelien@aurel32.net, proljc@gmail.com On 03/25/2016 05:50 AM, Aleksandar Markovic wrote: > @@ -2621,9 +2621,23 @@ uint64_t helper_float_cvtl_d(CPUMIPSState *env, uint64_t fdt0) > uint64_t dt2; > > dt2 = float64_to_int64(fdt0, &env->active_fpu.fp_status); > - if (get_float_exception_flags(&env->active_fpu.fp_status) > - & (float_flag_invalid | float_flag_overflow)) { > - dt2 = FP_TO_INT64_OVERFLOW; > + if (env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) { > + if (get_float_exception_flags(&env->active_fpu.fp_status) > + & (float_flag_invalid | float_flag_overflow)) { > + if (float64_is_any_nan(fdt0)) { > + dt2 = 0; > + } else { > + if (float64_is_neg(fdt0)) > + dt2 = INT64_MIN; > + else > + dt2 = INT64_MAX; > + } > + } > + } else { > + if (get_float_exception_flags(&env->active_fpu.fp_status) > + & (float_flag_invalid | float_flag_overflow)) { > + dt2 = FP_TO_INT64_OVERFLOW; > + } Better to swap the tests here, so that you test the exception flags first (and once). That is the exceptional condition, the one that will be true least often. After that, FCR31_NAN2008 will be tested only when needed. But also, this pattern is replicated so many times you'd do well to pull this sequence out to helper functions (one for s, one for d). > +uint64_t helper_float_abs_d(CPUMIPSState *env, uint64_t fdt0) > +{ > + uint64_t fdt1; > + > + if (env->active_fpu.fcr31 & (1 << FCR31_ABS2008)) { > + fdt1 = float64_abs(fdt0); > + } else { > + if (float64_is_neg(fdt0)) { > + fdt1 = float64_sub(0, fdt0, &env->active_fpu.fp_status); > + } else { > + fdt1 = float64_add(0, fdt0, &env->active_fpu.fp_status); > + } > + update_fcr31(env, GETPC()); Here you're better off using two separate helper functions, and chose the correct one during translation. Indeed, since the 2008 version is a simple bit-flip, you needn't actually have a helper; just expand the sequence inline. r~