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From: Florian Fainelli <f.fainelli@gmail.com>
To: linux-mips@linux-mips.org
Cc: ralf@linux-mips.org, blogic@openwrt.org, cernekee@gmail.com,
	jon.fraser@broadcom.com, pgynther@google.com,
	paul.burton@imgtec.com, ddaney.cavm@gmail.com
Subject: Re: [PATCH 0/6] MIPS: BMIPS: RIXI and workarounds support
Date: Mon, 28 Mar 2016 18:38:18 -0700	[thread overview]
Message-ID: <56F9DC8A.5080802@gmail.com> (raw)
In-Reply-To: <1455051354-6225-1-git-send-email-f.fainelli@gmail.com>

Le 09/02/2016 12:55, Florian Fainelli a écrit :
> Hi all,
> 
> This patch series contains some workarounds for some bug with pref30 on
> Broadcom BMIPS5000 CPUs in 7344, 7346 and 7425 chips, and some other changes
> to allow the use of RIXI/rotr on BMIPS4380 and BMIPS5000.
> 
> Finally, the last patch adds a debugfs entry for current_cpu_data.options since
> it might be useful to debug that at a time where we set on the final CPU
> options.
> 
> This is on top of mips-for-linux-next as of
> a13d2abd8e617a96d235c0a528a742b347650853 ("MIPS: highmem: Turn
> flush_cache_kmaps into a no-op.")

Ralf, patches 2-5 have been marked accepted in patchwork, but I am not
able to find them in mips-for-linux-next, have they been merged some
place else? Thanks

> 
> Thanks!
> 
> Florian Fainelli (6):
>   MIPS: BMIPS: Disable pref 30 for buggy CPUs
>   MIPS: BMIPS: Add early CPU initialization code
>   MIPS: Allow RIXI to be used on non-R2 or R6 cores
>   MIPS: Move RIXI exception enabling after vendor-specific cpu_probe
>   MIPS: BMIPS: BMIPS4380 and BMIPS5000 support RIXI
>   MIPS: Expose current_cpu_data.options through debugfs
> 
>  arch/mips/Kconfig                    |  7 +++
>  arch/mips/bmips/setup.c              | 17 +++++++
>  arch/mips/include/asm/bmips.h        |  1 +
>  arch/mips/include/asm/pgtable-bits.h | 11 ++---
>  arch/mips/kernel/cpu-probe.c         | 41 ++++++++++++-----
>  arch/mips/kernel/smp-bmips.c         | 87 ++++++++++++++++++++++++++++++++++++
>  arch/mips/mm/tlbex.c                 |  2 +-
>  7 files changed, 150 insertions(+), 16 deletions(-)
> 


-- 
Florian

      parent reply	other threads:[~2016-03-29  1:38 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-09 20:55 [PATCH 0/6] MIPS: BMIPS: RIXI and workarounds support Florian Fainelli
2016-02-09 20:55 ` [PATCH 1/6] MIPS: BMIPS: Disable pref 30 for buggy CPUs Florian Fainelli
2016-02-09 21:01   ` Florian Fainelli
2016-02-09 23:42     ` Petri Gynther
2016-02-09 23:45       ` Florian Fainelli
2016-02-09 21:19   ` Maciej W. Rozycki
2016-02-09 21:19     ` Maciej W. Rozycki
2016-02-09 22:40     ` Florian Fainelli
2016-02-09 23:52       ` Maciej W. Rozycki
2016-02-09 23:52         ` Maciej W. Rozycki
2016-02-10  0:04         ` Florian Fainelli
2016-02-10  0:54           ` Maciej W. Rozycki
2016-02-10  0:54             ` Maciej W. Rozycki
2016-02-10  9:20   ` Ralf Baechle
2016-02-10  9:22     ` Ralf Baechle
2016-02-10 14:20       ` Maciej W. Rozycki
2016-02-10 14:20         ` Maciej W. Rozycki
2016-02-09 20:55 ` [PATCH 2/6] MIPS: BMIPS: Add early CPU initialization code Florian Fainelli
2016-02-09 20:55 ` [PATCH 3/6] MIPS: Allow RIXI to be used on non-R2 or R6 cores Florian Fainelli
2016-02-09 20:55 ` [PATCH 4/6] MIPS: Move RIXI exception enabling after vendor-specific cpu_probe Florian Fainelli
2016-02-09 20:55 ` [PATCH 5/6] MIPS: BMIPS: BMIPS4380 and BMIPS5000 support RIXI Florian Fainelli
2016-02-09 20:55 ` [PATCH 6/6] MIPS: Expose current_cpu_data.options through debugfs Florian Fainelli
2016-02-10 10:46   ` Ralf Baechle
2016-02-11  1:58     ` Florian Fainelli
2016-03-29  1:38 ` Florian Fainelli [this message]

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