From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Thu, 31 Mar 2016 02:34:13 +0200 Subject: [U-Boot] [PATCH] sf: params: Add support for n25q016a In-Reply-To: <1459376611-5322-1-git-send-email-moritz.fischer@ettus.com> References: <1459376611-5322-1-git-send-email-moritz.fischer@ettus.com> Message-ID: <56FC7085.9060207@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 03/31/2016 12:23 AM, Moritz Fischer wrote: > This commits adds support for the N25Q016A, a 16Mbit > serial NOR flash from Micron. > > Signed-off-by: Moritz Fischer > --- > drivers/mtd/spi/sf_params.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c > index 4f37e33..8ae4eea 100644 > --- a/drivers/mtd/spi/sf_params.c > +++ b/drivers/mtd/spi/sf_params.c > @@ -83,6 +83,7 @@ const struct spi_flash_params spi_flash_params_table[] = { > {"M25P64", 0x202017, 0x0, 64 * 1024, 128, RD_NORM, 0}, > {"M25P128", 0x202018, 0x0, 256 * 1024, 64, RD_NORM, 0}, > {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K}, > + {"N25Q016A", 0x20bb15, 0x1000, 64 * 1024, 32, RD_NORM, SECT_4K}, According to [1], the device supports Quad I/O, so WR_QPP flag should be here in addition to SECT_4K . [1] https://www.micron.com/~/media/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_64mb_1_8v_65nm.pdf > {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, > {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, > {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K}, > -- Best regards, Marek Vasut