From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58426) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1anAuB-0002pW-BP for qemu-devel@nongnu.org; Mon, 04 Apr 2016 16:15:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1anAu6-0007W8-9J for qemu-devel@nongnu.org; Mon, 04 Apr 2016 16:15:23 -0400 Received: from mail-lb0-x242.google.com ([2a00:1450:4010:c04::242]:36562) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1anAu5-0007W2-UX for qemu-devel@nongnu.org; Mon, 04 Apr 2016 16:15:18 -0400 Received: by mail-lb0-x242.google.com with SMTP id q4so24685495lbq.3 for ; Mon, 04 Apr 2016 13:15:17 -0700 (PDT) Sender: Paolo Bonzini References: <1453976119-24372-1-git-send-email-alex.bennee@linaro.org> <1453976119-24372-4-git-send-email-alex.bennee@linaro.org> <87h9fl12zq.fsf@gmail.com> <57022283.5070400@redhat.com> <57029E74.8070509@redhat.com> From: Paolo Bonzini Message-ID: <5702CB51.60700@redhat.com> Date: Mon, 4 Apr 2016 22:15:13 +0200 MIME-Version: 1.0 In-Reply-To: <57029E74.8070509@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v1 3/5] include/qemu/atomic.h: default to __atomic functions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Pranith Kumar Cc: mttcg@greensocs.com, Peter Maydell , Mark Burton , alvise rigo , qemu-devel , stefanha@redhat.com, =?UTF-8?Q?Alex_Benn=c3=a9e?= , =?UTF-8?B?S09OUkFEIEZyw6lkw6lyaWM=?= On 04/04/2016 19:03, Paolo Bonzini wrote: > I've looked at private email from that time and I was pointed to this > sentence in GCC's manual, which says the opposite: > > "Note that in the C++11 memory model, fences (e.g., > ‘__atomic_thread_fence’) take effect in combination with other > atomic operations on specific memory locations (e.g., atomic loads); > operations on specific memory locations do not necessarily affect > other operations in the same way." And GCC is right, based on N3291 paragraph 29.8 ("Fences"): ---- A release fence A synchronizes with an acquire fence B if there exist atomic operations X and Y, both operating on some atomic object M, such that A is sequenced before X, X modifies M, Y is sequenced before B, and Y reads the value written by X or a value written by any side effect in the hypothetical release sequence X would head if it were a release operation. ----- It only mentions atomic operations, not plain loads and stores. Paolo