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From: York Sun <york.sun@nxp.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] arm: sleep: Get the entry point of kernel from SPARE4 register
Date: Tue, 5 Apr 2016 09:56:37 -0700	[thread overview]
Message-ID: <5703EE45.2040202@nxp.com> (raw)
In-Reply-To: <1459850484-28082-1-git-send-email-b18965@freescale.com>

On 04/05/2016 03:10 AM, Alison Wang wrote:
> For LS1021A Secure Boot, SPARE2 register is used and modified by the
> IBR. To avoid the conflict, SPARE4 is used instead of SPARE2 to store
> the entry point of kernel. This patch is to get the entry point of
> kernel from SPARE4 instead of SPARE2.
> 
> Signed-off-by: Alison Wang <alison.wang@nxp.com>
> ---
>  board/freescale/common/arm_sleep.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/board/freescale/common/arm_sleep.c b/board/freescale/common/arm_sleep.c
> index 71ed15e..6d967f0 100644
> --- a/board/freescale/common/arm_sleep.c
> +++ b/board/freescale/common/arm_sleep.c
> @@ -88,7 +88,7 @@ int fsl_dp_resume(void)
>  	dp_resume_prepare();
>  
>  	/* Get the entry address and jump to kernel */
> -	start_addr = in_le32(&scfg->sparecr[1]);
> +	start_addr = in_le32(&scfg->sparecr[3]);
>  	debug("Entry address is 0x%08x\n", start_addr);
>  	kernel_resume = (void (*)(void))start_addr;
>  	secure_ram_addr(_do_nonsec_entry)(kernel_resume, 0, 0, 0);
> 

Alison,

Does this change need to be in sync with Kernel change?

York

  reply	other threads:[~2016-04-05 16:56 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-05 10:01 [U-Boot] [PATCH] arm: sleep: Get the entry point of kernel from SPARE4 register Alison Wang
2016-04-05 16:56 ` York Sun [this message]
2016-04-05 22:20 ` [U-Boot] [u-boot] " Scott Wood
2016-04-06  2:16   ` Huan Wang
2016-04-06 19:46     ` Scott Wood
2016-04-07  9:11       ` Huan Wang
2016-04-07 16:08         ` Scott Wood

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