Re: [for-4.7 1/5] drivers/pl011: ACPI: The interrupt should always be high level triggered

[Julien Grall <julien.grall@arm.com>]

On 07/04/16 14:57, Shannon Zhao wrote:
> On 2016年04月07日 21:41, Julien Grall wrote:
>>
>> On 07/04/16 13:30, Shannon Zhao wrote:
>>>
>>>
>>> On 2016/4/7 18:59, Julien Grall wrote:
>>>> The SPCR does not specify if the interrupt is edge or level triggered.
>>>> So the configuration needs to be hardcoded in the code.
>>>>
>>>> Based on the PL011 TRM (see 2.2.8 in ARM DDI 0183G), the interrupt
>>>> generated
>>>> will be active high. This wording implies the interrupt should be
>>>> high level
>>>> triggered.
>>> I think active high can stand rising edge triggered for edge triggered
>>> interrupt.
>>>
>>> E.g. see "Table 5-118 Flag Definitions: Virtual Timer, EL2 timers, and
>>> Secure & Non-Secure EL1 timers" in ACPI SPEC 6.0.
>>
>> I've spoken with multiple person about the wording and the consensus is
>> "active high" would imply high level triggered. So it's very ambiguous.
>>
>> However, the PL011 is always using a high level triggered. You can look
>> at the device tree bindings such as the one for the foundation model.
>>
>> Also, the SBSA (section 4.3.2 in ARM-DEN-0029 v2.3) states the PL011
>> implemented with a level triggered interrupt.
>>
>> Note, I wasn't able to get the serial console working on my platform
>> with edge triggered interrupt.
>
> So how about IRQ_TYPE_LEVEL_HIGH instead of IRQ_TYPE_LEVEL_MASK?

Good point. I will likely resend only this patch and update the commit 
message too.

Regards,

-- 
Julien Grall

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