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Subject: Re: [PATCH v4 2/2] PCI: tegra: Support per-lane PHYs
To: Thierry Reding <thierry.reding@gmail.com>
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From: Stephen Warren <swarren@wwwdotorg.org>
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Date: Mon, 11 Apr 2016 11:41:10 -0600
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On 04/08/2016 10:13 AM, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> The current XUSB pad controller bindings are insufficient to describe
> PHY devices attached to USB controllers. New bindings have been created
> to overcome these restrictions. As a side-effect each root port now is
> assigned a set of PHY devices, one for each lane associated with the
> root port. This has the benefit of allowing fine-grained control of the
> power management for each lane.

Same here.

http://www.spinics.net/lists/devicetree/msg118644.html