From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33077) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1apqmk-0005Fh-QI for qemu-devel@nongnu.org; Tue, 12 Apr 2016 01:22:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1apqmf-0005FW-Ry for qemu-devel@nongnu.org; Tue, 12 Apr 2016 01:22:46 -0400 Received: from mout.web.de ([212.227.17.12]:62909) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1apqmf-0005FJ-Hw for qemu-devel@nongnu.org; Tue, 12 Apr 2016 01:22:41 -0400 References: <1460366363-4589-1-git-send-email-peterx@redhat.com> <1460366363-4589-13-git-send-email-peterx@redhat.com> From: Jan Kiszka Message-ID: <570C860A.4060203@web.de> Date: Mon, 11 Apr 2016 22:22:18 -0700 MIME-Version: 1.0 In-Reply-To: <1460366363-4589-13-git-send-email-peterx@redhat.com> Content-Type: text/plain; charset=iso-8859-15 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 12/13] intel_iommu: ioapic: IR support for emulated IOAPIC List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Xu , qemu-devel@nongnu.org Cc: imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com, jasowang@redhat.com, marcel@redhat.com, mst@redhat.com, pbonzini@redhat.com, rkrcmar@redhat.com On 2016-04-11 02:19, Peter Xu wrote: > diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c > index 378e663..d963d45 100644 > --- a/hw/intc/ioapic.c > +++ b/hw/intc/ioapic.c > @@ -57,6 +57,8 @@ static void ioapic_service(IOAPICCommonState *s) > uint64_t entry; > uint8_t dest; > uint8_t dest_mode; > + IntelIOMMUState *iommu = s->iommu; > + VTDIrq irq = {0}; > > for (i = 0; i < IOAPIC_NUM_PINS; i++) { > mask = 1 << i; > @@ -65,11 +67,33 @@ static void ioapic_service(IOAPICCommonState *s) > > entry = s->ioredtbl[i]; > if (!(entry & IOAPIC_LVT_MASKED)) { > - trig_mode = ((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1); > - dest = entry >> IOAPIC_LVT_DEST_SHIFT; > - dest_mode = (entry >> IOAPIC_LVT_DEST_MODE_SHIFT) & 1; > - delivery_mode = > - (entry >> IOAPIC_LVT_DELIV_MODE_SHIFT) & IOAPIC_DM_MASK; > + > + if (iommu && iommu->intr_enabled) { > + /* > + * Interrupt remapping is enabled in owner IOMMU, > + * we need to fetch the real IRQ information via > + * IRTE of the root mapping table > + */ > + if (vtd_interrupt_remap_ioapic(iommu, &entry, &irq)) { VT-d is only one of the possible IOMMUs on x86. Please introduce a generic interface. Look at Rita's and my patches: they translate the IOAPIC (and HPET...) interrupts into MSI messages that are then - in a generic way - intercepted by the respective IOMMU or directly dispatched to the APICs. We may no longer need new memory regions for this, thanks to the region attributes, but we also need no hard-coded hooks here. Thanks, Jan