From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laxman Dewangan Subject: Re: [PATCH 2/7] soc/tegra: pmc: Add new Tegra210 IO rails Date: Tue, 12 Apr 2016 22:29:43 +0530 Message-ID: <570D297F.1080701@nvidia.com> References: <1460473007-11535-1-git-send-email-ldewangan@nvidia.com> <1460473007-11535-3-git-send-email-ldewangan@nvidia.com> <20160412152830.GB30211@ulmo.ba.sec> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20160412152830.GB30211-EkSeR96xj6Pcmrwk2tT4+A@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Thierry Reding Cc: swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org, linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: linux-gpio@vger.kernel.org On Tuesday 12 April 2016 08:58 PM, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Tue, Apr 12, 2016 at 08:26:42PM +0530, Laxman Dewangan wrote: >> NVIDIA Tegra210 has extended the IO rails for new IO pads >> and added some new IO rails on top of its previous SoC. >> >> Add all supported IO rails from Tegra210 to the Tegra PMC header. >> >> Signed-off-by: Laxman Dewangan >> --- >> include/soc/tegra/pmc.h | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) >> >> diff --git a/include/soc/tegra/pmc.h b/include/soc/tegra/pmc.h >> index 07e332d..58fadc5 100644 >> --- a/include/soc/tegra/pmc.h >> +++ b/include/soc/tegra/pmc.h >> @@ -90,22 +90,36 @@ int tegra_pmc_cpu_remove_clamping(unsigned int cpuid); >> #define TEGRA_IO_RAIL_UART 14 >> #define TEGRA_IO_RAIL_BB 15 >> #define TEGRA_IO_RAIL_AUDIO 17 >> +#define TEGRA_IO_RAIL_USB3 18 >> #define TEGRA_IO_RAIL_HSIC 19 >> #define TEGRA_IO_RAIL_COMP 22 >> +#define TEGRA_IO_RAIL_DBG 25 >> +#define TEGRA_IO_RAIL_DBG_NONAO 26 >> +#define TEGRA_IO_RAIL_GPIO 27 >> #define TEGRA_IO_RAIL_HDMI 28 >> #define TEGRA_IO_RAIL_PEX_CNTRL 32 >> #define TEGRA_IO_RAIL_SDMMC1 33 >> #define TEGRA_IO_RAIL_SDMMC3 34 >> #define TEGRA_IO_RAIL_SDMMC4 35 >> +#define TEGRA_IO_RAIL_EMMC 35 >> #define TEGRA_IO_RAIL_CAM 36 >> #define TEGRA_IO_RAIL_RES 37 >> +#define TEGRA_IO_RAIL_EMMC2 37 > We have a duplicate entry for 37 now. The _RES might have meant > "reserved", in which case maybe just replace it with the new symbolic > name? OK, then make sense to replace RES with EMMC2. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965067AbcDLRK6 (ORCPT ); Tue, 12 Apr 2016 13:10:58 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:7611 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933862AbcDLRK4 (ORCPT ); Tue, 12 Apr 2016 13:10:56 -0400 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Tue, 12 Apr 2016 10:08:26 -0700 Message-ID: <570D297F.1080701@nvidia.com> Date: Tue, 12 Apr 2016 22:29:43 +0530 From: Laxman Dewangan User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.4.0 MIME-Version: 1.0 To: Thierry Reding CC: , , , , , , , , , Subject: Re: [PATCH 2/7] soc/tegra: pmc: Add new Tegra210 IO rails References: <1460473007-11535-1-git-send-email-ldewangan@nvidia.com> <1460473007-11535-3-git-send-email-ldewangan@nvidia.com> <20160412152830.GB30211@ulmo.ba.sec> In-Reply-To: <20160412152830.GB30211@ulmo.ba.sec> X-Originating-IP: [10.19.65.30] X-ClientProxiedBy: DRHKMAIL103.nvidia.com (10.25.59.17) To bgmail102.nvidia.com (10.25.59.11) Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tuesday 12 April 2016 08:58 PM, Thierry Reding wrote: > * PGP Signed by an unknown key > > On Tue, Apr 12, 2016 at 08:26:42PM +0530, Laxman Dewangan wrote: >> NVIDIA Tegra210 has extended the IO rails for new IO pads >> and added some new IO rails on top of its previous SoC. >> >> Add all supported IO rails from Tegra210 to the Tegra PMC header. >> >> Signed-off-by: Laxman Dewangan >> --- >> include/soc/tegra/pmc.h | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) >> >> diff --git a/include/soc/tegra/pmc.h b/include/soc/tegra/pmc.h >> index 07e332d..58fadc5 100644 >> --- a/include/soc/tegra/pmc.h >> +++ b/include/soc/tegra/pmc.h >> @@ -90,22 +90,36 @@ int tegra_pmc_cpu_remove_clamping(unsigned int cpuid); >> #define TEGRA_IO_RAIL_UART 14 >> #define TEGRA_IO_RAIL_BB 15 >> #define TEGRA_IO_RAIL_AUDIO 17 >> +#define TEGRA_IO_RAIL_USB3 18 >> #define TEGRA_IO_RAIL_HSIC 19 >> #define TEGRA_IO_RAIL_COMP 22 >> +#define TEGRA_IO_RAIL_DBG 25 >> +#define TEGRA_IO_RAIL_DBG_NONAO 26 >> +#define TEGRA_IO_RAIL_GPIO 27 >> #define TEGRA_IO_RAIL_HDMI 28 >> #define TEGRA_IO_RAIL_PEX_CNTRL 32 >> #define TEGRA_IO_RAIL_SDMMC1 33 >> #define TEGRA_IO_RAIL_SDMMC3 34 >> #define TEGRA_IO_RAIL_SDMMC4 35 >> +#define TEGRA_IO_RAIL_EMMC 35 >> #define TEGRA_IO_RAIL_CAM 36 >> #define TEGRA_IO_RAIL_RES 37 >> +#define TEGRA_IO_RAIL_EMMC2 37 > We have a duplicate entry for 37 now. The _RES might have meant > "reserved", in which case maybe just replace it with the new symbolic > name? OK, then make sense to replace RES with EMMC2.