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From: "Cédric Le Goater" <clg@fr.ibm.com>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: Thomas Huth <thuth@redhat.com>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 00/10] ppc: preparing pnv landing
Date: Wed, 13 Apr 2016 11:15:15 +0200	[thread overview]
Message-ID: <570E0E23.4020105@fr.ibm.com> (raw)
In-Reply-To: <20160321231417.GL23586@voom.redhat.com>

On 03/22/2016 12:14 AM, David Gibson wrote:
> On Mon, Mar 21, 2016 at 01:52:30PM +0100, Cédric Le Goater wrote:
>> Hello,
>>
>> This is a first mini-serie of patches adding support for new ppc SPRs.
>> They were taken from Ben's larger patchset adding the ppc powernv
>> platform and they should already be useful for the pseries guest
>> migration.
>>
>> Initial patches come from :
>>
>> 	https://github.com/ozbenh/qemu/commits/powernv
>>
>> The changes are mostly due to the rebase on Dave's 2.6 branch:
>>
>> 	https://github.com/dgibson/qemu/commits/ppc-for-2.6 ppc-for-2.6-20160316
>>
>> A couple more are bisect and checkpatch fixes and finally some patches
>> were merge to reduce the noise.
> 
> Applied to ppc-for-2.6, thanks.


Hello David,

I have identified this next serie of prerequisites for PowerNV that should 
not need too much discussion. When would be the right time to send them ? 

	[PATCH 01/77] ppc: Remove MMU_MODEn_SUFFIX definitions
	[PATCH 02/77] ppc: Use split I/D mmu modes to avoid flushes on
	[PATCH 03/77] ppc: Do some batching of TCG tlb flushes
	[PATCH 07/77] ppc: Add a bunch of hypervisor SPRs to Book3s
	[PATCH 09/77] ppc: Fix hreg_store_msr() so that non-HV mode cannot
	[PATCH 10/77] ppc: Fix rfi/rfid/hrfi/... emulation
	[PATCH 12/77] ppc: Better figure out if processor has HV mode
	[PATCH 13/77] ppc: tlbie, tlbia and tlbisync are HV only
	[PATCH 14/77] ppc: Change 'invalid' bit mask of tlbiel and tlbie
	[PATCH 15/77] ppc: Fix sign extension issue in mtmsr(d) emulation
	[PATCH 16/77] ppc: Get out of emulation on SMT "OR" ops
	[PATCH 17/77] ppc: Add PPC_64H instruction flag to POWER7 and POWER8


The exception model changes are rather invasive but they are complex so 
I will keep them for later and I would like to try getting the xics changes 
out of the way first. They are a pain to maintain out of the mainline tree. 
Could we follow on with xics then ? 

Thanks,

C.

  reply	other threads:[~2016-04-13  9:16 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-21 12:52 [Qemu-devel] [PATCH v3 00/10] ppc: preparing pnv landing Cédric Le Goater
2016-03-21 12:52 ` [Qemu-devel] [PATCH v3 01/10] ppc: Update SPR definitions Cédric Le Goater
2016-03-21 12:52 ` [Qemu-devel] [PATCH v3 02/10] ppc: Add macros to register hypervisor mode SPRs Cédric Le Goater
2016-03-21 12:52 ` [Qemu-devel] [PATCH v3 03/10] ppc: Add a bunch of hypervisor SPRs to Book3s Cédric Le Goater
2016-03-21 12:52 ` [Qemu-devel] [PATCH v3 04/10] ppc: Create cpu_ppc_set_papr() helper Cédric Le Goater
2016-03-21 23:15   ` David Gibson
2016-03-22  7:05     ` Cédric Le Goater
2016-03-22 23:09       ` David Gibson
2016-03-21 12:52 ` [Qemu-devel] [PATCH v3 05/10] ppc: Add dummy SPR_IC for POWER8 Cédric Le Goater
2016-03-21 12:52 ` [Qemu-devel] [PATCH v3 06/10] ppc: Initialize AMOR in PAPR mode Cédric Le Goater
2016-03-21 12:52 ` [Qemu-devel] [PATCH v3 07/10] ppc: Fix writing to AMR/UAMOR Cédric Le Goater
2016-03-21 12:52 ` [Qemu-devel] [PATCH v3 08/10] ppc: Add POWER8 IAMR register Cédric Le Goater
2016-03-21 12:52 ` [Qemu-devel] [PATCH v3 09/10] ppc: Add dummy CIABR SPR Cédric Le Goater
2016-03-21 12:52 ` [Qemu-devel] [PATCH v3 10/10] ppc: A couple more dummy POWER8 Book4 regs Cédric Le Goater
2016-03-22 13:56   ` Thomas Huth
2016-03-22 14:03     ` Cédric Le Goater
2016-03-21 23:14 ` [Qemu-devel] [PATCH v3 00/10] ppc: preparing pnv landing David Gibson
2016-04-13  9:15   ` Cédric Le Goater [this message]
2016-04-15  2:18     ` [Qemu-devel] [Qemu-ppc] " David Gibson

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