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From: Ramalingam C <ramalingam.c@intel.com>
To: Daniel Vetter <daniel@ffwll.ch>, Jani Nikula <jani.nikula@intel.com>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>,
	"Syrjala, Ville" <ville.syrjala@intel.com>
Subject: Re: [PATCH 2/2] drm/i915/BXT: Tolerance at BXT DSI pipe_config comparison
Date: Wed, 13 Apr 2016 18:34:25 +0530	[thread overview]
Message-ID: <570E43D9.3080501@intel.com> (raw)
In-Reply-To: <CAKMK7uFLwYKak2U5j4d-MZ=_rJL_QOysutM0=3pYXRf0Gw8esw@mail.gmail.com>


On Wednesday 13 April 2016 05:27 PM, Daniel Vetter wrote:
> On Wed, Apr 13, 2016 at 1:48 PM, Daniel Vetter <daniel@ffwll.ch> wrote:
>> On Wed, Apr 13, 2016 at 1:06 PM, Jani Nikula <jani.nikula@intel.com> wrote:
>>>> Then fix adjusted_mode to have the timings in terms of txbyteclkhs
>>>> already. Problem solved.
>>> I let Ville convince me there would be problems with that. Ville, care
>>> to fill in the details?
>> If we change them too hard the accurate vblank timestamp stuff will be
>> upset. But then we only need to adjust horizontal timings for dsi,
>> whereas on gen5+ the vblank ts code uses the line counter (i.e.
>> vertical timings) only.
>>
>> If it's just that it should work, and I don't think we have any other
>> users of the adjusted_mode.
> Ok, I was wrong and we obviously need the right dotclock to compute
> linedur_ns correctly in drm_calc_timestamping_constants(). So either
> we adjust the dotclock of adjusted_mode too (imo makes most sense), or
> we need yet another mode somewhere and use that for dsi cross checking
> (real ugly imo). More I missed?
Another point to be considered:
And we program hsync, hfp and hbp in terms of txbyteclkhs to port 
register, which are not part of adjusted_mode.
So for BXT DSI, we have to store them interms of txbyteclkhs and compare 
with hsync, hfp and hbp read from HW??
> -Daniel

-- 
Thanks,
--Ram

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  reply	other threads:[~2016-04-13 13:13 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-29 17:34 [PATCH 1/2] drm/i915/BXT: Get pipe conf from the port registers Ramalingam C
2016-03-29 17:34 ` [PATCH 2/2] drm/i915/BXT: Tolerance at BXT DSI pipe_config comparison Ramalingam C
2016-03-29 18:28   ` kbuild test robot
2016-03-30 11:03   ` Jani Nikula
2016-03-30 11:32   ` Daniel Vetter
2016-03-30 14:19     ` Ramalingam C
2016-03-30 19:04       ` Daniel Vetter
2016-04-04 15:43         ` Ramalingam C
2016-04-05  8:30           ` Jani Nikula
2016-04-05  9:40             ` Ramalingam C
2016-04-13 10:06               ` Daniel Vetter
2016-04-13 11:06                 ` Jani Nikula
2016-04-13 11:48                   ` Daniel Vetter
2016-04-13 11:57                     ` Daniel Vetter
2016-04-13 13:04                       ` Ramalingam C [this message]
2016-04-13 14:46                         ` Daniel Vetter
2016-04-15 10:57                           ` Ramalingam C
2016-04-19 10:30                             ` Ramalingam C
2016-04-13 10:05             ` Daniel Vetter
2016-03-30  6:14 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/BXT: Get pipe conf from the port registers Patchwork
2016-03-30 10:43 ` [PATCH 1/2] " Jani Nikula
2016-03-30 13:28   ` Ramalingam C
2016-03-30 13:53     ` [PATCH 1/2] drm/i915: Sharing the pixel_format_from_vbt to whole i915 Ramalingam C
2016-03-30 13:53       ` [PATCH 2/2] drm/i915/BXT: Get pipe conf from the port registers Ramalingam C
2016-04-04  9:18         ` Ramalingam C
2016-04-06 11:45         ` Jani Nikula
2016-04-06 11:37       ` [PATCH 1/2] drm/i915: Sharing the pixel_format_from_vbt to whole i915 Jani Nikula
2016-03-31 12:51 ` ✗ Fi.CI.BAT: failure for series starting with [2/2] drm/i915/BXT: Get pipe conf from the port registers (rev3) Patchwork

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