From mboxrd@z Thu Jan 1 00:00:00 1970 From: Nicolas Ferre Subject: Re: [PATCH v5 22/50] mtd: nand: atmel: switch to mtd_ooblayout_ops Date: Wed, 13 Apr 2016 17:15:53 +0200 Message-ID: <570E62A9.5020204@atmel.com> References: <1459354505-32551-1-git-send-email-boris.brezillon@free-electrons.com> <1459354505-32551-23-git-send-email-boris.brezillon@free-electrons.com> Reply-To: nicolas.ferre-AIFe0yeh4nAAvxtiuMwx3w@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <1459354505-32551-23-git-send-email-boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Boris Brezillon , David Woodhouse , Brian Norris , linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Richard Weinberger Cc: Daniel Mack , Haojian Zhuang , Robert Jarzmik , Kukjin Kim , Krzysztof Kozlowski , linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Ralf Baechle , linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org, Jean-Christophe Plagniol-Villard , Alexandre Belloni , Wenyou Yang , Josh Wu , Ezequiel Garcia , Maxime Ripard , Chen-Yu Tsai , linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Stefan Agner , Kyungmin Park , Greg Kroah-Hartman , devel-gWbeCf7V1WCQmaza687I9mD2FQJk+8+b@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, pun List-Id: linux-api@vger.kernel.org Le 30/03/2016 18:14, Boris Brezillon a =C3=A9crit : > Implementing the mtd_ooblayout_ops interface is the new way of exposing > ECC/OOB layout to MTD users. >=20 > Signed-off-by: Boris Brezillon It seems good: Reviewed-by: Nicolas Ferre Bye, > --- > drivers/mtd/nand/atmel_nand.c | 84 ++++++++++++++++++++-----------------= ------ > 1 file changed, 38 insertions(+), 46 deletions(-) >=20 > diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.= c > index 321d331..46a601e 100644 > --- a/drivers/mtd/nand/atmel_nand.c > +++ b/drivers/mtd/nand/atmel_nand.c > @@ -72,30 +72,44 @@ struct atmel_nand_nfc_caps { > uint32_t rb_mask; > }; > =20 > -/* oob layout for large page size > +/* > + * oob layout for large page size > * bad block info is on bytes 0 and 1 > * the bytes have to be consecutives to avoid > * several NAND_CMD_RNDOUT during read > - */ > -static struct nand_ecclayout atmel_oobinfo_large =3D { > - .eccbytes =3D 4, > - .eccpos =3D {60, 61, 62, 63}, > - .oobfree =3D { > - {2, 58} > - }, > -}; > - > -/* oob layout for small page size > + * > + * oob layout for small page size > * bad block info is on bytes 4 and 5 > * the bytes have to be consecutives to avoid > * several NAND_CMD_RNDOUT during read > */ > -static struct nand_ecclayout atmel_oobinfo_small =3D { > - .eccbytes =3D 4, > - .eccpos =3D {0, 1, 2, 3}, > - .oobfree =3D { > - {6, 10} > - }, > +static int atmel_ooblayout_ecc_sp(struct mtd_info *mtd, int section, > + struct mtd_oob_region *oobregion) > +{ > + if (section) > + return -ERANGE; > + > + oobregion->length =3D 4; > + oobregion->offset =3D 0; > + > + return 0; > +} > + > +static int atmel_ooblayout_free_sp(struct mtd_info *mtd, int section, > + struct mtd_oob_region *oobregion) > +{ > + if (section) > + return -ERANGE; > + > + oobregion->offset =3D 6; > + oobregion->length =3D mtd->oobsize - oobregion->offset; > + > + return 0; > +} > + > +static const struct mtd_ooblayout_ops atmel_ooblayout_sp_ops =3D { > + .ecc =3D atmel_ooblayout_ecc_sp, > + .free =3D atmel_ooblayout_free_sp, > }; > =20 > struct atmel_nfc { > @@ -163,8 +177,6 @@ struct atmel_nand_host { > int *pmecc_delta; > }; > =20 > -static struct nand_ecclayout atmel_pmecc_oobinfo; > - > /* > * Enable NAND. > */ > @@ -483,22 +495,6 @@ static int pmecc_get_ecc_bytes(int cap, int sector_s= ize) > return (m * cap + 7) / 8; > } > =20 > -static void pmecc_config_ecc_layout(struct nand_ecclayout *layout, > - int oobsize, int ecc_len) > -{ > - int i; > - > - layout->eccbytes =3D ecc_len; > - > - /* ECC will occupy the last ecc_len bytes continuously */ > - for (i =3D 0; i < ecc_len; i++) > - layout->eccpos[i] =3D oobsize - ecc_len + i; > - > - layout->oobfree[0].offset =3D PMECC_OOB_RESERVED_BYTES; > - layout->oobfree[0].length =3D > - oobsize - ecc_len - layout->oobfree[0].offset; > -} > - > static void __iomem *pmecc_get_alpha_to(struct atmel_nand_host *host) > { > int table_size; > @@ -1013,8 +1009,8 @@ static void atmel_pmecc_core_init(struct mtd_info *= mtd) > { > struct nand_chip *nand_chip =3D mtd_to_nand(mtd); > struct atmel_nand_host *host =3D nand_get_controller_data(nand_chip); > + int eccbytes =3D mtd_ooblayout_count_eccbytes(mtd); > uint32_t val =3D 0; > - struct nand_ecclayout *ecc_layout; > struct mtd_oob_region oobregion; > =20 > pmecc_writel(host->ecc, CTRL, PMECC_CTRL_RST); > @@ -1065,12 +1061,11 @@ static void atmel_pmecc_core_init(struct mtd_info= *mtd) > | PMECC_CFG_AUTO_DISABLE); > pmecc_writel(host->ecc, CFG, val); > =20 > - ecc_layout =3D nand_chip->ecc.layout; > pmecc_writel(host->ecc, SAREA, mtd->oobsize - 1); > mtd_ooblayout_ecc(mtd, 0, &oobregion); > pmecc_writel(host->ecc, SADDR, oobregion.offset); > pmecc_writel(host->ecc, EADDR, > - oobregion.offset + ecc_layout->eccbytes - 1); > + oobregion.offset + eccbytes - 1); > /* See datasheet about PMECC Clock Control Register */ > pmecc_writel(host->ecc, CLK, 2); > pmecc_writel(host->ecc, IDR, 0xff); > @@ -1292,11 +1287,8 @@ static int atmel_pmecc_nand_init_params(struct pla= tform_device *pdev, > err_no =3D -EINVAL; > goto err; > } > - pmecc_config_ecc_layout(&atmel_pmecc_oobinfo, > - mtd->oobsize, > - nand_chip->ecc.total); > =20 > - nand_chip->ecc.layout =3D &atmel_pmecc_oobinfo; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > break; > default: > dev_warn(host->dev, > @@ -1644,19 +1636,19 @@ static int atmel_hw_nand_init_params(struct platf= orm_device *pdev, > /* set ECC page size and oob layout */ > switch (mtd->writesize) { > case 512: > - nand_chip->ecc.layout =3D &atmel_oobinfo_small; > + mtd_set_ooblayout(mtd, &atmel_ooblayout_sp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_528); > break; > case 1024: > - nand_chip->ecc.layout =3D &atmel_oobinfo_large; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_1056); > break; > case 2048: > - nand_chip->ecc.layout =3D &atmel_oobinfo_large; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_2112); > break; > case 4096: > - nand_chip->ecc.layout =3D &atmel_oobinfo_large; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_4224); > break; > default: >=20 --=20 Nicolas Ferre --=20 You received this message because you are subscribed to the Google Groups "= linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an e= mail to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org For more options, visit https://groups.google.com/d/optout. From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 13 Apr 2016 17:15:46 +0200 (CEST) Received: from eusmtp01.atmel.com ([212.144.249.242]:3657 "EHLO eusmtp01.atmel.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27006955AbcDMPPmetZGK (ORCPT ); Wed, 13 Apr 2016 17:15:42 +0200 Received: from HNOCHT01.corp.atmel.com (10.161.30.161) by eusmtp01.atmel.com (10.161.101.30) with Microsoft SMTP Server (TLS) id 14.3.235.1; Wed, 13 Apr 2016 17:15:32 +0200 Received: from [10.159.245.112] (10.161.30.18) by HNOCHT01.corp.atmel.com (10.161.30.161) with Microsoft SMTP Server (TLS) id 14.3.235.1; Wed, 13 Apr 2016 17:15:35 +0200 Subject: Re: [PATCH v5 22/50] mtd: nand: atmel: switch to mtd_ooblayout_ops To: Boris Brezillon , David Woodhouse , Brian Norris , , Richard Weinberger References: <1459354505-32551-1-git-send-email-boris.brezillon@free-electrons.com> <1459354505-32551-23-git-send-email-boris.brezillon@free-electrons.com> CC: Daniel Mack , Haojian Zhuang , Robert Jarzmik , "Kukjin Kim" , Krzysztof Kozlowski , , , Ralf Baechle , , Jean-Christophe Plagniol-Villard , Alexandre Belloni , Wenyou Yang , Josh Wu , Ezequiel Garcia , Maxime Ripard , Chen-Yu Tsai , , Stefan Agner , Kyungmin Park , Greg Kroah-Hartman , , , "punnaiah choudary kalluri" , Priit Laes , "Kamal Dasu" , , , Harvey Hunt , "Archit Taneja" , Han Xu , Huang Shijie From: Nicolas Ferre Organization: atmel Message-ID: <570E62A9.5020204@atmel.com> Date: Wed, 13 Apr 2016 17:15:53 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <1459354505-32551-23-git-send-email-boris.brezillon@free-electrons.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.161.30.18] Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 52970 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: nicolas.ferre@atmel.com Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips Le 30/03/2016 18:14, Boris Brezillon a écrit : > Implementing the mtd_ooblayout_ops interface is the new way of exposing > ECC/OOB layout to MTD users. > > Signed-off-by: Boris Brezillon It seems good: Reviewed-by: Nicolas Ferre Bye, > --- > drivers/mtd/nand/atmel_nand.c | 84 ++++++++++++++++++++----------------------- > 1 file changed, 38 insertions(+), 46 deletions(-) > > diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c > index 321d331..46a601e 100644 > --- a/drivers/mtd/nand/atmel_nand.c > +++ b/drivers/mtd/nand/atmel_nand.c > @@ -72,30 +72,44 @@ struct atmel_nand_nfc_caps { > uint32_t rb_mask; > }; > > -/* oob layout for large page size > +/* > + * oob layout for large page size > * bad block info is on bytes 0 and 1 > * the bytes have to be consecutives to avoid > * several NAND_CMD_RNDOUT during read > - */ > -static struct nand_ecclayout atmel_oobinfo_large = { > - .eccbytes = 4, > - .eccpos = {60, 61, 62, 63}, > - .oobfree = { > - {2, 58} > - }, > -}; > - > -/* oob layout for small page size > + * > + * oob layout for small page size > * bad block info is on bytes 4 and 5 > * the bytes have to be consecutives to avoid > * several NAND_CMD_RNDOUT during read > */ > -static struct nand_ecclayout atmel_oobinfo_small = { > - .eccbytes = 4, > - .eccpos = {0, 1, 2, 3}, > - .oobfree = { > - {6, 10} > - }, > +static int atmel_ooblayout_ecc_sp(struct mtd_info *mtd, int section, > + struct mtd_oob_region *oobregion) > +{ > + if (section) > + return -ERANGE; > + > + oobregion->length = 4; > + oobregion->offset = 0; > + > + return 0; > +} > + > +static int atmel_ooblayout_free_sp(struct mtd_info *mtd, int section, > + struct mtd_oob_region *oobregion) > +{ > + if (section) > + return -ERANGE; > + > + oobregion->offset = 6; > + oobregion->length = mtd->oobsize - oobregion->offset; > + > + return 0; > +} > + > +static const struct mtd_ooblayout_ops atmel_ooblayout_sp_ops = { > + .ecc = atmel_ooblayout_ecc_sp, > + .free = atmel_ooblayout_free_sp, > }; > > struct atmel_nfc { > @@ -163,8 +177,6 @@ struct atmel_nand_host { > int *pmecc_delta; > }; > > -static struct nand_ecclayout atmel_pmecc_oobinfo; > - > /* > * Enable NAND. > */ > @@ -483,22 +495,6 @@ static int pmecc_get_ecc_bytes(int cap, int sector_size) > return (m * cap + 7) / 8; > } > > -static void pmecc_config_ecc_layout(struct nand_ecclayout *layout, > - int oobsize, int ecc_len) > -{ > - int i; > - > - layout->eccbytes = ecc_len; > - > - /* ECC will occupy the last ecc_len bytes continuously */ > - for (i = 0; i < ecc_len; i++) > - layout->eccpos[i] = oobsize - ecc_len + i; > - > - layout->oobfree[0].offset = PMECC_OOB_RESERVED_BYTES; > - layout->oobfree[0].length = > - oobsize - ecc_len - layout->oobfree[0].offset; > -} > - > static void __iomem *pmecc_get_alpha_to(struct atmel_nand_host *host) > { > int table_size; > @@ -1013,8 +1009,8 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd) > { > struct nand_chip *nand_chip = mtd_to_nand(mtd); > struct atmel_nand_host *host = nand_get_controller_data(nand_chip); > + int eccbytes = mtd_ooblayout_count_eccbytes(mtd); > uint32_t val = 0; > - struct nand_ecclayout *ecc_layout; > struct mtd_oob_region oobregion; > > pmecc_writel(host->ecc, CTRL, PMECC_CTRL_RST); > @@ -1065,12 +1061,11 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd) > | PMECC_CFG_AUTO_DISABLE); > pmecc_writel(host->ecc, CFG, val); > > - ecc_layout = nand_chip->ecc.layout; > pmecc_writel(host->ecc, SAREA, mtd->oobsize - 1); > mtd_ooblayout_ecc(mtd, 0, &oobregion); > pmecc_writel(host->ecc, SADDR, oobregion.offset); > pmecc_writel(host->ecc, EADDR, > - oobregion.offset + ecc_layout->eccbytes - 1); > + oobregion.offset + eccbytes - 1); > /* See datasheet about PMECC Clock Control Register */ > pmecc_writel(host->ecc, CLK, 2); > pmecc_writel(host->ecc, IDR, 0xff); > @@ -1292,11 +1287,8 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev, > err_no = -EINVAL; > goto err; > } > - pmecc_config_ecc_layout(&atmel_pmecc_oobinfo, > - mtd->oobsize, > - nand_chip->ecc.total); > > - nand_chip->ecc.layout = &atmel_pmecc_oobinfo; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > break; > default: > dev_warn(host->dev, > @@ -1644,19 +1636,19 @@ static int atmel_hw_nand_init_params(struct platform_device *pdev, > /* set ECC page size and oob layout */ > switch (mtd->writesize) { > case 512: > - nand_chip->ecc.layout = &atmel_oobinfo_small; > + mtd_set_ooblayout(mtd, &atmel_ooblayout_sp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_528); > break; > case 1024: > - nand_chip->ecc.layout = &atmel_oobinfo_large; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_1056); > break; > case 2048: > - nand_chip->ecc.layout = &atmel_oobinfo_large; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_2112); > break; > case 4096: > - nand_chip->ecc.layout = &atmel_oobinfo_large; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_4224); > break; > default: > -- Nicolas Ferre From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eusmtp01.atmel.com ([212.144.249.242]:3657 "EHLO eusmtp01.atmel.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27006955AbcDMPPmetZGK (ORCPT ); Wed, 13 Apr 2016 17:15:42 +0200 Subject: Re: [PATCH v5 22/50] mtd: nand: atmel: switch to mtd_ooblayout_ops References: <1459354505-32551-1-git-send-email-boris.brezillon@free-electrons.com> <1459354505-32551-23-git-send-email-boris.brezillon@free-electrons.com> From: Nicolas Ferre Message-ID: <570E62A9.5020204@atmel.com> Date: Wed, 13 Apr 2016 17:15:53 +0200 MIME-Version: 1.0 In-Reply-To: <1459354505-32551-23-git-send-email-boris.brezillon@free-electrons.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 8bit Return-Path: Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-subscribe: List-owner: List-post: List-archive: To: Boris Brezillon , David Woodhouse , Brian Norris , linux-mtd@lists.infradead.org, Richard Weinberger Cc: Daniel Mack , Haojian Zhuang , Robert Jarzmik , Kukjin Kim , Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Ralf Baechle , linux-mips@linux-mips.org, Jean-Christophe Plagniol-Villard , Alexandre Belloni , Wenyou Yang , Josh Wu , Ezequiel Garcia , Maxime Ripard , Chen-Yu Tsai , linux-sunxi@googlegroups.com, Stefan Agner , Kyungmin Park , Greg Kroah-Hartman , devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org, punnaiah choudary kalluri , Priit Laes , Kamal Dasu , bcm-kernel-feedback-list@broadcom.com, linux-api@vger.kernel.org, Harvey Hunt , Archit Taneja , Han Xu , Huang Shijie Message-ID: <20160413151553.y2Kf_EfIbwbAzSH-fTAGjoT21zfY4t57V3q1oWMoEKM@z> Le 30/03/2016 18:14, Boris Brezillon a écrit : > Implementing the mtd_ooblayout_ops interface is the new way of exposing > ECC/OOB layout to MTD users. > > Signed-off-by: Boris Brezillon It seems good: Reviewed-by: Nicolas Ferre Bye, > --- > drivers/mtd/nand/atmel_nand.c | 84 ++++++++++++++++++++----------------------- > 1 file changed, 38 insertions(+), 46 deletions(-) > > diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c > index 321d331..46a601e 100644 > --- a/drivers/mtd/nand/atmel_nand.c > +++ b/drivers/mtd/nand/atmel_nand.c > @@ -72,30 +72,44 @@ struct atmel_nand_nfc_caps { > uint32_t rb_mask; > }; > > -/* oob layout for large page size > +/* > + * oob layout for large page size > * bad block info is on bytes 0 and 1 > * the bytes have to be consecutives to avoid > * several NAND_CMD_RNDOUT during read > - */ > -static struct nand_ecclayout atmel_oobinfo_large = { > - .eccbytes = 4, > - .eccpos = {60, 61, 62, 63}, > - .oobfree = { > - {2, 58} > - }, > -}; > - > -/* oob layout for small page size > + * > + * oob layout for small page size > * bad block info is on bytes 4 and 5 > * the bytes have to be consecutives to avoid > * several NAND_CMD_RNDOUT during read > */ > -static struct nand_ecclayout atmel_oobinfo_small = { > - .eccbytes = 4, > - .eccpos = {0, 1, 2, 3}, > - .oobfree = { > - {6, 10} > - }, > +static int atmel_ooblayout_ecc_sp(struct mtd_info *mtd, int section, > + struct mtd_oob_region *oobregion) > +{ > + if (section) > + return -ERANGE; > + > + oobregion->length = 4; > + oobregion->offset = 0; > + > + return 0; > +} > + > +static int atmel_ooblayout_free_sp(struct mtd_info *mtd, int section, > + struct mtd_oob_region *oobregion) > +{ > + if (section) > + return -ERANGE; > + > + oobregion->offset = 6; > + oobregion->length = mtd->oobsize - oobregion->offset; > + > + return 0; > +} > + > +static const struct mtd_ooblayout_ops atmel_ooblayout_sp_ops = { > + .ecc = atmel_ooblayout_ecc_sp, > + .free = atmel_ooblayout_free_sp, > }; > > struct atmel_nfc { > @@ -163,8 +177,6 @@ struct atmel_nand_host { > int *pmecc_delta; > }; > > -static struct nand_ecclayout atmel_pmecc_oobinfo; > - > /* > * Enable NAND. > */ > @@ -483,22 +495,6 @@ static int pmecc_get_ecc_bytes(int cap, int sector_size) > return (m * cap + 7) / 8; > } > > -static void pmecc_config_ecc_layout(struct nand_ecclayout *layout, > - int oobsize, int ecc_len) > -{ > - int i; > - > - layout->eccbytes = ecc_len; > - > - /* ECC will occupy the last ecc_len bytes continuously */ > - for (i = 0; i < ecc_len; i++) > - layout->eccpos[i] = oobsize - ecc_len + i; > - > - layout->oobfree[0].offset = PMECC_OOB_RESERVED_BYTES; > - layout->oobfree[0].length = > - oobsize - ecc_len - layout->oobfree[0].offset; > -} > - > static void __iomem *pmecc_get_alpha_to(struct atmel_nand_host *host) > { > int table_size; > @@ -1013,8 +1009,8 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd) > { > struct nand_chip *nand_chip = mtd_to_nand(mtd); > struct atmel_nand_host *host = nand_get_controller_data(nand_chip); > + int eccbytes = mtd_ooblayout_count_eccbytes(mtd); > uint32_t val = 0; > - struct nand_ecclayout *ecc_layout; > struct mtd_oob_region oobregion; > > pmecc_writel(host->ecc, CTRL, PMECC_CTRL_RST); > @@ -1065,12 +1061,11 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd) > | PMECC_CFG_AUTO_DISABLE); > pmecc_writel(host->ecc, CFG, val); > > - ecc_layout = nand_chip->ecc.layout; > pmecc_writel(host->ecc, SAREA, mtd->oobsize - 1); > mtd_ooblayout_ecc(mtd, 0, &oobregion); > pmecc_writel(host->ecc, SADDR, oobregion.offset); > pmecc_writel(host->ecc, EADDR, > - oobregion.offset + ecc_layout->eccbytes - 1); > + oobregion.offset + eccbytes - 1); > /* See datasheet about PMECC Clock Control Register */ > pmecc_writel(host->ecc, CLK, 2); > pmecc_writel(host->ecc, IDR, 0xff); > @@ -1292,11 +1287,8 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev, > err_no = -EINVAL; > goto err; > } > - pmecc_config_ecc_layout(&atmel_pmecc_oobinfo, > - mtd->oobsize, > - nand_chip->ecc.total); > > - nand_chip->ecc.layout = &atmel_pmecc_oobinfo; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > break; > default: > dev_warn(host->dev, > @@ -1644,19 +1636,19 @@ static int atmel_hw_nand_init_params(struct platform_device *pdev, > /* set ECC page size and oob layout */ > switch (mtd->writesize) { > case 512: > - nand_chip->ecc.layout = &atmel_oobinfo_small; > + mtd_set_ooblayout(mtd, &atmel_ooblayout_sp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_528); > break; > case 1024: > - nand_chip->ecc.layout = &atmel_oobinfo_large; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_1056); > break; > case 2048: > - nand_chip->ecc.layout = &atmel_oobinfo_large; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_2112); > break; > case 4096: > - nand_chip->ecc.layout = &atmel_oobinfo_large; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_4224); > break; > default: > -- Nicolas Ferre From mboxrd@z Thu Jan 1 00:00:00 1970 From: nicolas.ferre@atmel.com (Nicolas Ferre) Date: Wed, 13 Apr 2016 17:15:53 +0200 Subject: [PATCH v5 22/50] mtd: nand: atmel: switch to mtd_ooblayout_ops In-Reply-To: <1459354505-32551-23-git-send-email-boris.brezillon@free-electrons.com> References: <1459354505-32551-1-git-send-email-boris.brezillon@free-electrons.com> <1459354505-32551-23-git-send-email-boris.brezillon@free-electrons.com> Message-ID: <570E62A9.5020204@atmel.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Le 30/03/2016 18:14, Boris Brezillon a ?crit : > Implementing the mtd_ooblayout_ops interface is the new way of exposing > ECC/OOB layout to MTD users. > > Signed-off-by: Boris Brezillon It seems good: Reviewed-by: Nicolas Ferre Bye, > --- > drivers/mtd/nand/atmel_nand.c | 84 ++++++++++++++++++++----------------------- > 1 file changed, 38 insertions(+), 46 deletions(-) > > diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c > index 321d331..46a601e 100644 > --- a/drivers/mtd/nand/atmel_nand.c > +++ b/drivers/mtd/nand/atmel_nand.c > @@ -72,30 +72,44 @@ struct atmel_nand_nfc_caps { > uint32_t rb_mask; > }; > > -/* oob layout for large page size > +/* > + * oob layout for large page size > * bad block info is on bytes 0 and 1 > * the bytes have to be consecutives to avoid > * several NAND_CMD_RNDOUT during read > - */ > -static struct nand_ecclayout atmel_oobinfo_large = { > - .eccbytes = 4, > - .eccpos = {60, 61, 62, 63}, > - .oobfree = { > - {2, 58} > - }, > -}; > - > -/* oob layout for small page size > + * > + * oob layout for small page size > * bad block info is on bytes 4 and 5 > * the bytes have to be consecutives to avoid > * several NAND_CMD_RNDOUT during read > */ > -static struct nand_ecclayout atmel_oobinfo_small = { > - .eccbytes = 4, > - .eccpos = {0, 1, 2, 3}, > - .oobfree = { > - {6, 10} > - }, > +static int atmel_ooblayout_ecc_sp(struct mtd_info *mtd, int section, > + struct mtd_oob_region *oobregion) > +{ > + if (section) > + return -ERANGE; > + > + oobregion->length = 4; > + oobregion->offset = 0; > + > + return 0; > +} > + > +static int atmel_ooblayout_free_sp(struct mtd_info *mtd, int section, > + struct mtd_oob_region *oobregion) > +{ > + if (section) > + return -ERANGE; > + > + oobregion->offset = 6; > + oobregion->length = mtd->oobsize - oobregion->offset; > + > + return 0; > +} > + > +static const struct mtd_ooblayout_ops atmel_ooblayout_sp_ops = { > + .ecc = atmel_ooblayout_ecc_sp, > + .free = atmel_ooblayout_free_sp, > }; > > struct atmel_nfc { > @@ -163,8 +177,6 @@ struct atmel_nand_host { > int *pmecc_delta; > }; > > -static struct nand_ecclayout atmel_pmecc_oobinfo; > - > /* > * Enable NAND. > */ > @@ -483,22 +495,6 @@ static int pmecc_get_ecc_bytes(int cap, int sector_size) > return (m * cap + 7) / 8; > } > > -static void pmecc_config_ecc_layout(struct nand_ecclayout *layout, > - int oobsize, int ecc_len) > -{ > - int i; > - > - layout->eccbytes = ecc_len; > - > - /* ECC will occupy the last ecc_len bytes continuously */ > - for (i = 0; i < ecc_len; i++) > - layout->eccpos[i] = oobsize - ecc_len + i; > - > - layout->oobfree[0].offset = PMECC_OOB_RESERVED_BYTES; > - layout->oobfree[0].length = > - oobsize - ecc_len - layout->oobfree[0].offset; > -} > - > static void __iomem *pmecc_get_alpha_to(struct atmel_nand_host *host) > { > int table_size; > @@ -1013,8 +1009,8 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd) > { > struct nand_chip *nand_chip = mtd_to_nand(mtd); > struct atmel_nand_host *host = nand_get_controller_data(nand_chip); > + int eccbytes = mtd_ooblayout_count_eccbytes(mtd); > uint32_t val = 0; > - struct nand_ecclayout *ecc_layout; > struct mtd_oob_region oobregion; > > pmecc_writel(host->ecc, CTRL, PMECC_CTRL_RST); > @@ -1065,12 +1061,11 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd) > | PMECC_CFG_AUTO_DISABLE); > pmecc_writel(host->ecc, CFG, val); > > - ecc_layout = nand_chip->ecc.layout; > pmecc_writel(host->ecc, SAREA, mtd->oobsize - 1); > mtd_ooblayout_ecc(mtd, 0, &oobregion); > pmecc_writel(host->ecc, SADDR, oobregion.offset); > pmecc_writel(host->ecc, EADDR, > - oobregion.offset + ecc_layout->eccbytes - 1); > + oobregion.offset + eccbytes - 1); > /* See datasheet about PMECC Clock Control Register */ > pmecc_writel(host->ecc, CLK, 2); > pmecc_writel(host->ecc, IDR, 0xff); > @@ -1292,11 +1287,8 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev, > err_no = -EINVAL; > goto err; > } > - pmecc_config_ecc_layout(&atmel_pmecc_oobinfo, > - mtd->oobsize, > - nand_chip->ecc.total); > > - nand_chip->ecc.layout = &atmel_pmecc_oobinfo; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > break; > default: > dev_warn(host->dev, > @@ -1644,19 +1636,19 @@ static int atmel_hw_nand_init_params(struct platform_device *pdev, > /* set ECC page size and oob layout */ > switch (mtd->writesize) { > case 512: > - nand_chip->ecc.layout = &atmel_oobinfo_small; > + mtd_set_ooblayout(mtd, &atmel_ooblayout_sp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_528); > break; > case 1024: > - nand_chip->ecc.layout = &atmel_oobinfo_large; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_1056); > break; > case 2048: > - nand_chip->ecc.layout = &atmel_oobinfo_large; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_2112); > break; > case 4096: > - nand_chip->ecc.layout = &atmel_oobinfo_large; > + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); > ecc_writel(host->ecc, MR, ATMEL_ECC_PAGESIZE_4224); > break; > default: > -- Nicolas Ferre