From mboxrd@z Thu Jan 1 00:00:00 1970 From: nsekhar@ti.com (Sekhar Nori) Date: Mon, 18 Apr 2016 11:25:16 +0530 Subject: [PATCH 1/3] ARM: DTS: da850: add node for spi0 In-Reply-To: <57111433.6080402@lechnology.com> References: <1460586628-25152-1-git-send-email-david@lechnology.com> <1460586628-25152-2-git-send-email-david@lechnology.com> <5710C176.3040304@ti.com> <57111433.6080402@lechnology.com> Message-ID: <571476C4.6050201@ti.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Friday 15 April 2016 09:47 PM, David Lechner wrote: > On 04/15/2016 05:24 AM, Sekhar Nori wrote: > >> >> This made me notice that num-cs is populated wrongly for spi1. It >> actually has 8 chip selects. This is fine though. > > I might as well fix it since I have to make changes anyway. Don't > remember how I came up with 6. In section 3.7.7 of datasheet, there are 6 possible chip selects listed for SPI0 and 8 possible chipselects for SPI1. If you are fixing SPI1, please make that a separate patch. >> Also, it will be nice to add pinctrl entries for spi0 like it is done >> for spi1. You will need those anyway for using the interface. > > I omitted this on purpose. For my use case, I am using the SPI as > write-only, so not using the SOMI pin, which is actually muxed as a GPIO > for something else. So having a pinctl like spi1 is of no use to me. I > figured if someone needs it, they can add it, otherwise it just is > wasted space to me. Alright, makes sense. Regards, Sekhar From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sekhar Nori Subject: Re: [PATCH 1/3] ARM: DTS: da850: add node for spi0 Date: Mon, 18 Apr 2016 11:25:16 +0530 Message-ID: <571476C4.6050201@ti.com> References: <1460586628-25152-1-git-send-email-david@lechnology.com> <1460586628-25152-2-git-send-email-david@lechnology.com> <5710C176.3040304@ti.com> <57111433.6080402@lechnology.com> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <57111433.6080402@lechnology.com> Sender: linux-kernel-owner@vger.kernel.org To: David Lechner Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Kevin Hilman , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org List-Id: devicetree@vger.kernel.org On Friday 15 April 2016 09:47 PM, David Lechner wrote: > On 04/15/2016 05:24 AM, Sekhar Nori wrote: > >> >> This made me notice that num-cs is populated wrongly for spi1. It >> actually has 8 chip selects. This is fine though. > > I might as well fix it since I have to make changes anyway. Don't > remember how I came up with 6. In section 3.7.7 of datasheet, there are 6 possible chip selects listed for SPI0 and 8 possible chipselects for SPI1. If you are fixing SPI1, please make that a separate patch. >> Also, it will be nice to add pinctrl entries for spi0 like it is done >> for spi1. You will need those anyway for using the interface. > > I omitted this on purpose. For my use case, I am using the SPI as > write-only, so not using the SOMI pin, which is actually muxed as a GPIO > for something else. So having a pinctl like spi1 is of no use to me. I > figured if someone needs it, they can add it, otherwise it just is > wasted space to me. Alright, makes sense. Regards, Sekhar From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751986AbcDRF4z (ORCPT ); Mon, 18 Apr 2016 01:56:55 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:43213 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751883AbcDRF4v (ORCPT ); Mon, 18 Apr 2016 01:56:51 -0400 Subject: Re: [PATCH 1/3] ARM: DTS: da850: add node for spi0 To: David Lechner References: <1460586628-25152-1-git-send-email-david@lechnology.com> <1460586628-25152-2-git-send-email-david@lechnology.com> <5710C176.3040304@ti.com> <57111433.6080402@lechnology.com> CC: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Kevin Hilman , , , From: Sekhar Nori Message-ID: <571476C4.6050201@ti.com> Date: Mon, 18 Apr 2016 11:25:16 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <57111433.6080402@lechnology.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Friday 15 April 2016 09:47 PM, David Lechner wrote: > On 04/15/2016 05:24 AM, Sekhar Nori wrote: > >> >> This made me notice that num-cs is populated wrongly for spi1. It >> actually has 8 chip selects. This is fine though. > > I might as well fix it since I have to make changes anyway. Don't > remember how I came up with 6. In section 3.7.7 of datasheet, there are 6 possible chip selects listed for SPI0 and 8 possible chipselects for SPI1. If you are fixing SPI1, please make that a separate patch. >> Also, it will be nice to add pinctrl entries for spi0 like it is done >> for spi1. You will need those anyway for using the interface. > > I omitted this on purpose. For my use case, I am using the SPI as > write-only, so not using the SOMI pin, which is actually muxed as a GPIO > for something else. So having a pinctl like spi1 is of no use to me. I > figured if someone needs it, they can add it, otherwise it just is > wasted space to me. Alright, makes sense. Regards, Sekhar