From mboxrd@z Thu Jan 1 00:00:00 1970 From: Roger Quadros Subject: Re: [PATCH v5 39/50] mtd: nand: omap2: switch to mtd_ooblayout_ops Date: Tue, 19 Apr 2016 15:30:39 +0300 Message-ID: <571624EF.9060707@ti.com> References: <1459354505-32551-1-git-send-email-boris.brezillon@free-electrons.com> <1459354505-32551-40-git-send-email-boris.brezillon@free-electrons.com> <5714F011.5080409@ti.com> <20160418170518.363f732d@bbrezillon> <57160862.90603@ti.com> <20160419132206.5d909f7e@bbrezillon> Reply-To: rogerq-l0cyMroinI0@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <20160419132206.5d909f7e@bbrezillon> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Boris Brezillon Cc: David Woodhouse , Brian Norris , linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Richard Weinberger , linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org, Krzysztof Kozlowski , Harvey Hunt , Nicolas Ferre , Stefan Agner , linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, Alexandre Belloni , punnaiah choudary kalluri , Robert Jarzmik , devel-gWbeCf7V1WCQmaza687I9mD2FQJk+8+b@public.gmane.org, Archit Taneja , linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Kamal Dasu , Josh Wu , Chen-Yu Tsai , Kukjin Kim , bcm-kerne List-Id: linux-api@vger.kernel.org On 19/04/16 14:22, Boris Brezillon wrote: > Hi Roger, > > On Tue, 19 Apr 2016 13:28:50 +0300 > Roger Quadros wrote: > >>> @@ -1921,6 +1927,9 @@ static int omap_nand_probe(struct platform_device *pdev) >>> nand_chip->ecc.correct = omap_correct_data; >>> mtd_set_ooblayout(mtd, &omap_ooblayout_ops); >>> oobbytes_per_step = nand_chip->ecc.bytes; >>> + >>> + if (nand_chip->options & NAND_BUSWIDTH_16) >>> + min_oobbytes = 1; >> >> Shouldn't this have been >> if (!(nand_chip->options & NAND_BUSWIDTH_16) >> min_oobbytes = 1; >> ? > > Yep. > >> >>> break; >>> >>> case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW: >>> @@ -2038,10 +2047,8 @@ static int omap_nand_probe(struct platform_device *pdev) >>> } >>> >>> /* check if NAND device's OOB is enough to store ECC signatures */ >>> - min_oobbytes = (oobbytes_per_step * >>> - (mtd->writesize / nand_chip->ecc.size)) + >>> - (nand_chip->options & NAND_BUSWIDTH_16 ? >>> - BADBLOCK_MARKER_LENGTH : 1); >>> + min_oobbytes += (oobbytes_per_step * >>> + (mtd->writesize / nand_chip->ecc.size)); >>> if (mtd->oobsize < min_oobbytes) { >>> dev_err(&info->pdev->dev, >>> "not enough OOB bytes required = %d, available=%d\n", >>> >> >> After the above changes BCH with HW ECC worked fine but BCH with SW ECC still failed. >> I had to fix it up with the below patch. This is mainly because chip->ecc.steps wasn't >> yet initialized before calling nand_bch_init(). >> >> After the below patch it worked fine with bch4 (hw & sw), bch8 (hw & sw) and ham1. >> I couldn't yet verify bch16 though. > I just verified that bch16 works as well. > Thanks for the fix, but I'd prefer fixing the bug for all soft BCH > users. > > Could you try this patch? I tried your patch and it worked fine. You will still need the below change to omap2.c -- cheers, -roger diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index 0abfba6..33c8fde 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -1715,7 +1715,7 @@ static int omap_sw_ooblayout_free(struct mtd_info *mtd, int section, struct nand_chip *chip = mtd_to_nand(mtd); int off = BADBLOCK_MARKER_LENGTH; - if (section) + if (section >= chip->ecc.steps) return -ERANGE; /* -- 2.5.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 19 Apr 2016 14:31:51 +0200 (CEST) Received: from bear.ext.ti.com ([192.94.94.41]:45561 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27027022AbcDSMbtsKZ89 (ORCPT ); Tue, 19 Apr 2016 14:31:49 +0200 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id u3JCUpdm000753; Tue, 19 Apr 2016 07:30:51 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u3JCUorC001187; Tue, 19 Apr 2016 07:30:50 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.224.2; Tue, 19 Apr 2016 07:30:49 -0500 Received: from [192.168.2.6] (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u3JCUej2014924; Tue, 19 Apr 2016 07:30:40 -0500 Subject: Re: [PATCH v5 39/50] mtd: nand: omap2: switch to mtd_ooblayout_ops To: Boris Brezillon References: <1459354505-32551-1-git-send-email-boris.brezillon@free-electrons.com> <1459354505-32551-40-git-send-email-boris.brezillon@free-electrons.com> <5714F011.5080409@ti.com> <20160418170518.363f732d@bbrezillon> <57160862.90603@ti.com> <20160419132206.5d909f7e@bbrezillon> CC: David Woodhouse , Brian Norris , , Richard Weinberger , , Krzysztof Kozlowski , Harvey Hunt , Nicolas Ferre , Stefan Agner , , Alexandre Belloni , punnaiah choudary kalluri , Robert Jarzmik , , Archit Taneja , , Kamal Dasu , Josh Wu , Chen-Yu Tsai , Kukjin Kim , , Ezequiel Garcia , Huang Shijie , Jean-Christophe Plagniol-Villard , Haojian Zhuang , Han Xu , , Priit Laes , Greg Kroah-Hartman , , Ralf Baechle , Wenyou Yang , Kyungmin Park , , Maxime Ripard , Daniel Mack From: Roger Quadros Message-ID: <571624EF.9060707@ti.com> Date: Tue, 19 Apr 2016 15:30:39 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.6.0 MIME-Version: 1.0 In-Reply-To: <20160419132206.5d909f7e@bbrezillon> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 53101 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: rogerq@ti.com Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips On 19/04/16 14:22, Boris Brezillon wrote: > Hi Roger, > > On Tue, 19 Apr 2016 13:28:50 +0300 > Roger Quadros wrote: > >>> @@ -1921,6 +1927,9 @@ static int omap_nand_probe(struct platform_device *pdev) >>> nand_chip->ecc.correct = omap_correct_data; >>> mtd_set_ooblayout(mtd, &omap_ooblayout_ops); >>> oobbytes_per_step = nand_chip->ecc.bytes; >>> + >>> + if (nand_chip->options & NAND_BUSWIDTH_16) >>> + min_oobbytes = 1; >> >> Shouldn't this have been >> if (!(nand_chip->options & NAND_BUSWIDTH_16) >> min_oobbytes = 1; >> ? > > Yep. > >> >>> break; >>> >>> case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW: >>> @@ -2038,10 +2047,8 @@ static int omap_nand_probe(struct platform_device *pdev) >>> } >>> >>> /* check if NAND device's OOB is enough to store ECC signatures */ >>> - min_oobbytes = (oobbytes_per_step * >>> - (mtd->writesize / nand_chip->ecc.size)) + >>> - (nand_chip->options & NAND_BUSWIDTH_16 ? >>> - BADBLOCK_MARKER_LENGTH : 1); >>> + min_oobbytes += (oobbytes_per_step * >>> + (mtd->writesize / nand_chip->ecc.size)); >>> if (mtd->oobsize < min_oobbytes) { >>> dev_err(&info->pdev->dev, >>> "not enough OOB bytes required = %d, available=%d\n", >>> >> >> After the above changes BCH with HW ECC worked fine but BCH with SW ECC still failed. >> I had to fix it up with the below patch. This is mainly because chip->ecc.steps wasn't >> yet initialized before calling nand_bch_init(). >> >> After the below patch it worked fine with bch4 (hw & sw), bch8 (hw & sw) and ham1. >> I couldn't yet verify bch16 though. > I just verified that bch16 works as well. > Thanks for the fix, but I'd prefer fixing the bug for all soft BCH > users. > > Could you try this patch? I tried your patch and it worked fine. You will still need the below change to omap2.c -- cheers, -roger diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index 0abfba6..33c8fde 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -1715,7 +1715,7 @@ static int omap_sw_ooblayout_free(struct mtd_info *mtd, int section, struct nand_chip *chip = mtd_to_nand(mtd); int off = BADBLOCK_MARKER_LENGTH; - if (section) + if (section >= chip->ecc.steps) return -ERANGE; /* -- 2.5.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bear.ext.ti.com ([192.94.94.41]:45561 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27027022AbcDSMbtsKZ89 (ORCPT ); Tue, 19 Apr 2016 14:31:49 +0200 Subject: Re: [PATCH v5 39/50] mtd: nand: omap2: switch to mtd_ooblayout_ops References: <1459354505-32551-1-git-send-email-boris.brezillon@free-electrons.com> <1459354505-32551-40-git-send-email-boris.brezillon@free-electrons.com> <5714F011.5080409@ti.com> <20160418170518.363f732d@bbrezillon> <57160862.90603@ti.com> <20160419132206.5d909f7e@bbrezillon> From: Roger Quadros Message-ID: <571624EF.9060707@ti.com> Date: Tue, 19 Apr 2016 15:30:39 +0300 MIME-Version: 1.0 In-Reply-To: <20160419132206.5d909f7e@bbrezillon> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Return-Path: Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-subscribe: List-owner: List-post: List-archive: To: Boris Brezillon Cc: David Woodhouse , Brian Norris , linux-mtd@lists.infradead.org, Richard Weinberger , linux-mips@linux-mips.org, Krzysztof Kozlowski , Harvey Hunt , Nicolas Ferre , Stefan Agner , linux-sunxi@googlegroups.com, Alexandre Belloni , punnaiah choudary kalluri , Robert Jarzmik , devel@driverdev.osuosl.org, Archit Taneja , linux-samsung-soc@vger.kernel.org, Kamal Dasu , Josh Wu , Chen-Yu Tsai , Kukjin Kim , bcm-kernel-feedback-list@broadcom.com, Ezequiel Garcia , Huang Shijie , Jean-Christophe Plagniol-Villard , Haojian Zhuang , Han Xu , linux-arm-kernel@lists.infradead.org, Priit Laes , Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Ralf Baechle , Wenyou Yang , Kyungmin Park , linux-api@vger.kernel.org, Maxime Ripard , Daniel Mack Message-ID: <20160419123039.9mlpSli6QvQDK28RVrBlrL9PjjgVlDlqiJzFK444SPA@z> On 19/04/16 14:22, Boris Brezillon wrote: > Hi Roger, > > On Tue, 19 Apr 2016 13:28:50 +0300 > Roger Quadros wrote: > >>> @@ -1921,6 +1927,9 @@ static int omap_nand_probe(struct platform_device *pdev) >>> nand_chip->ecc.correct = omap_correct_data; >>> mtd_set_ooblayout(mtd, &omap_ooblayout_ops); >>> oobbytes_per_step = nand_chip->ecc.bytes; >>> + >>> + if (nand_chip->options & NAND_BUSWIDTH_16) >>> + min_oobbytes = 1; >> >> Shouldn't this have been >> if (!(nand_chip->options & NAND_BUSWIDTH_16) >> min_oobbytes = 1; >> ? > > Yep. > >> >>> break; >>> >>> case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW: >>> @@ -2038,10 +2047,8 @@ static int omap_nand_probe(struct platform_device *pdev) >>> } >>> >>> /* check if NAND device's OOB is enough to store ECC signatures */ >>> - min_oobbytes = (oobbytes_per_step * >>> - (mtd->writesize / nand_chip->ecc.size)) + >>> - (nand_chip->options & NAND_BUSWIDTH_16 ? >>> - BADBLOCK_MARKER_LENGTH : 1); >>> + min_oobbytes += (oobbytes_per_step * >>> + (mtd->writesize / nand_chip->ecc.size)); >>> if (mtd->oobsize < min_oobbytes) { >>> dev_err(&info->pdev->dev, >>> "not enough OOB bytes required = %d, available=%d\n", >>> >> >> After the above changes BCH with HW ECC worked fine but BCH with SW ECC still failed. >> I had to fix it up with the below patch. This is mainly because chip->ecc.steps wasn't >> yet initialized before calling nand_bch_init(). >> >> After the below patch it worked fine with bch4 (hw & sw), bch8 (hw & sw) and ham1. >> I couldn't yet verify bch16 though. > I just verified that bch16 works as well. > Thanks for the fix, but I'd prefer fixing the bug for all soft BCH > users. > > Could you try this patch? I tried your patch and it worked fine. You will still need the below change to omap2.c -- cheers, -roger diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index 0abfba6..33c8fde 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -1715,7 +1715,7 @@ static int omap_sw_ooblayout_free(struct mtd_info *mtd, int section, struct nand_chip *chip = mtd_to_nand(mtd); int off = BADBLOCK_MARKER_LENGTH; - if (section) + if (section >= chip->ecc.steps) return -ERANGE; /* -- 2.5.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: rogerq@ti.com (Roger Quadros) Date: Tue, 19 Apr 2016 15:30:39 +0300 Subject: [PATCH v5 39/50] mtd: nand: omap2: switch to mtd_ooblayout_ops In-Reply-To: <20160419132206.5d909f7e@bbrezillon> References: <1459354505-32551-1-git-send-email-boris.brezillon@free-electrons.com> <1459354505-32551-40-git-send-email-boris.brezillon@free-electrons.com> <5714F011.5080409@ti.com> <20160418170518.363f732d@bbrezillon> <57160862.90603@ti.com> <20160419132206.5d909f7e@bbrezillon> Message-ID: <571624EF.9060707@ti.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 19/04/16 14:22, Boris Brezillon wrote: > Hi Roger, > > On Tue, 19 Apr 2016 13:28:50 +0300 > Roger Quadros wrote: > >>> @@ -1921,6 +1927,9 @@ static int omap_nand_probe(struct platform_device *pdev) >>> nand_chip->ecc.correct = omap_correct_data; >>> mtd_set_ooblayout(mtd, &omap_ooblayout_ops); >>> oobbytes_per_step = nand_chip->ecc.bytes; >>> + >>> + if (nand_chip->options & NAND_BUSWIDTH_16) >>> + min_oobbytes = 1; >> >> Shouldn't this have been >> if (!(nand_chip->options & NAND_BUSWIDTH_16) >> min_oobbytes = 1; >> ? > > Yep. > >> >>> break; >>> >>> case OMAP_ECC_BCH4_CODE_HW_DETECTION_SW: >>> @@ -2038,10 +2047,8 @@ static int omap_nand_probe(struct platform_device *pdev) >>> } >>> >>> /* check if NAND device's OOB is enough to store ECC signatures */ >>> - min_oobbytes = (oobbytes_per_step * >>> - (mtd->writesize / nand_chip->ecc.size)) + >>> - (nand_chip->options & NAND_BUSWIDTH_16 ? >>> - BADBLOCK_MARKER_LENGTH : 1); >>> + min_oobbytes += (oobbytes_per_step * >>> + (mtd->writesize / nand_chip->ecc.size)); >>> if (mtd->oobsize < min_oobbytes) { >>> dev_err(&info->pdev->dev, >>> "not enough OOB bytes required = %d, available=%d\n", >>> >> >> After the above changes BCH with HW ECC worked fine but BCH with SW ECC still failed. >> I had to fix it up with the below patch. This is mainly because chip->ecc.steps wasn't >> yet initialized before calling nand_bch_init(). >> >> After the below patch it worked fine with bch4 (hw & sw), bch8 (hw & sw) and ham1. >> I couldn't yet verify bch16 though. > I just verified that bch16 works as well. > Thanks for the fix, but I'd prefer fixing the bug for all soft BCH > users. > > Could you try this patch? I tried your patch and it worked fine. You will still need the below change to omap2.c -- cheers, -roger diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c index 0abfba6..33c8fde 100644 --- a/drivers/mtd/nand/omap2.c +++ b/drivers/mtd/nand/omap2.c @@ -1715,7 +1715,7 @@ static int omap_sw_ooblayout_free(struct mtd_info *mtd, int section, struct nand_chip *chip = mtd_to_nand(mtd); int off = BADBLOCK_MARKER_LENGTH; - if (section) + if (section >= chip->ecc.steps) return -ERANGE; /* -- 2.5.0