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diff for duplicates of <571629BC.6000605@redhat.com>

diff --git a/a/1.txt b/N1/1.txt
index 0a9f48b..669defc 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -52,7 +52,7 @@ On 14/04/2016 16:49, Thomas Huth wrote:
 > +		      :
 > +		      "r11", "r12", "memory");
 > +
-> +#if  __BYTE_ORDER__ = __ORDER_LITTLE_ENDIAN__
+> +#if  __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
 > +	/*
 > +	 * lswi is supposed to cause an alignment exception in little endian
 > +	 * mode, but QEMU does not support it. So in case we do not get an
@@ -64,9 +64,9 @@ On 14/04/2016 16:49, Thomas Huth wrote:
 > +		return;
 > +	}
 > +#endif
-> +	report("partial", regs[0] = 0x01020300 && regs[1] = (uint64_t)-1);
+> +	report("partial", regs[0] == 0x01020300 && regs[1] == (uint64_t)-1);
 > +
-> +	/* check NB = 0 => 32 bytes. */
+> +	/* check NB = 0 ==> 32 bytes. */
 > +	asm volatile ("li r19,-1;"
 > +		      "mr r11, r19; mr r12, r19; mr r13, r19;"
 > +		      "mr r14, r19; mr r15, r19; mr r16, r19;"
@@ -94,11 +94,11 @@ On 14/04/2016 16:49, Thomas Huth wrote:
 > +		      "r11", "r12", "r13", "r14", "r15", "r16", "r17",
 > +		      "r18", "r19", "memory");
 > +
-> +	report("length", regs[0] = 0x01020304 && regs[1] = 0x05060708 &&
-> +			 regs[2] = 0x090a0b0c && regs[3] = 0x0d0e0f10 &&
-> +			 regs[4] = 0x11121314 && regs[5] = 0x15161718 &&
-> +			 regs[6] = 0x191a1b1c && regs[7] = 0x1d1e1f20 &&
-> +			 regs[8] = (uint64_t)-1);
+> +	report("length", regs[0] == 0x01020304 && regs[1] == 0x05060708 &&
+> +			 regs[2] == 0x090a0b0c && regs[3] == 0x0d0e0f10 &&
+> +			 regs[4] == 0x11121314 && regs[5] == 0x15161718 &&
+> +			 regs[6] == 0x191a1b1c && regs[7] == 0x1d1e1f20 &&
+> +			 regs[8] == (uint64_t)-1);
 > +
 > +	/* check wrap around to r0 */
 > +	asm volatile ("li r31,-1;"
@@ -114,8 +114,8 @@ On 14/04/2016 16:49, Thomas Huth wrote:
 > +		      /* modify two registers from r31, wrap around to r0 */
 > +		      "r31", "r0", "memory");
 > +
-> +	report("wrap around to r0", regs[0] = 0x01020304 &&
-> +			            regs[1] = 0x05060708);
+> +	report("wrap around to r0", regs[0] == 0x01020304 &&
+> +			            regs[1] == 0x05060708);
 > +
 > +	/* check wrap around doesn't break RA */
 > +	asm volatile ("mr r29,r1\n"
@@ -149,7 +149,7 @@ Reviewed-by: Laurent Vivier <lvivier@redhat.com>
 > +	 * overwrite the register.
 > +	 * In all the cases, the register must stay untouched
 > +	 */
-> +	report("Don't overwrite Ra", regs[2] = (uint64_t)addr);
+> +	report("Don't overwrite Ra", regs[2] == (uint64_t)addr);
 > +
 > +	report_prefix_pop();
 > +}
diff --git a/a/content_digest b/N1/content_digest
index df4e8fd..8e3890f 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,7 +1,7 @@
  "ref\01460645382-31616-1-git-send-email-thuth@redhat.com\0"
  "From\0Laurent Vivier <lvivier@redhat.com>\0"
  "Subject\0Re: [kvm-unit-test PATCH v2] powerpc: Add emulator test for the lswi instruction\0"
- "Date\0Tue, 19 Apr 2016 12:51:08 +0000\0"
+ "Date\0Tue, 19 Apr 2016 14:51:08 +0200\0"
  "To\0Thomas Huth <thuth@redhat.com>"
  " kvm@vger.kernel.org\0"
  "Cc\0kvm-ppc@vger.kernel.org"
@@ -63,7 +63,7 @@
  "> +\t\t      :\n"
  "> +\t\t      \"r11\", \"r12\", \"memory\");\n"
  "> +\n"
- "> +#if  __BYTE_ORDER__ = __ORDER_LITTLE_ENDIAN__\n"
+ "> +#if  __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__\n"
  "> +\t/*\n"
  "> +\t * lswi is supposed to cause an alignment exception in little endian\n"
  "> +\t * mode, but QEMU does not support it. So in case we do not get an\n"
@@ -75,9 +75,9 @@
  "> +\t\treturn;\n"
  "> +\t}\n"
  "> +#endif\n"
- "> +\treport(\"partial\", regs[0] = 0x01020300 && regs[1] = (uint64_t)-1);\n"
+ "> +\treport(\"partial\", regs[0] == 0x01020300 && regs[1] == (uint64_t)-1);\n"
  "> +\n"
- "> +\t/* check NB = 0 => 32 bytes. */\n"
+ "> +\t/* check NB = 0 ==> 32 bytes. */\n"
  "> +\tasm volatile (\"li r19,-1;\"\n"
  "> +\t\t      \"mr r11, r19; mr r12, r19; mr r13, r19;\"\n"
  "> +\t\t      \"mr r14, r19; mr r15, r19; mr r16, r19;\"\n"
@@ -105,11 +105,11 @@
  "> +\t\t      \"r11\", \"r12\", \"r13\", \"r14\", \"r15\", \"r16\", \"r17\",\n"
  "> +\t\t      \"r18\", \"r19\", \"memory\");\n"
  "> +\n"
- "> +\treport(\"length\", regs[0] = 0x01020304 && regs[1] = 0x05060708 &&\n"
- "> +\t\t\t regs[2] = 0x090a0b0c && regs[3] = 0x0d0e0f10 &&\n"
- "> +\t\t\t regs[4] = 0x11121314 && regs[5] = 0x15161718 &&\n"
- "> +\t\t\t regs[6] = 0x191a1b1c && regs[7] = 0x1d1e1f20 &&\n"
- "> +\t\t\t regs[8] = (uint64_t)-1);\n"
+ "> +\treport(\"length\", regs[0] == 0x01020304 && regs[1] == 0x05060708 &&\n"
+ "> +\t\t\t regs[2] == 0x090a0b0c && regs[3] == 0x0d0e0f10 &&\n"
+ "> +\t\t\t regs[4] == 0x11121314 && regs[5] == 0x15161718 &&\n"
+ "> +\t\t\t regs[6] == 0x191a1b1c && regs[7] == 0x1d1e1f20 &&\n"
+ "> +\t\t\t regs[8] == (uint64_t)-1);\n"
  "> +\n"
  "> +\t/* check wrap around to r0 */\n"
  "> +\tasm volatile (\"li r31,-1;\"\n"
@@ -125,8 +125,8 @@
  "> +\t\t      /* modify two registers from r31, wrap around to r0 */\n"
  "> +\t\t      \"r31\", \"r0\", \"memory\");\n"
  "> +\n"
- "> +\treport(\"wrap around to r0\", regs[0] = 0x01020304 &&\n"
- "> +\t\t\t            regs[1] = 0x05060708);\n"
+ "> +\treport(\"wrap around to r0\", regs[0] == 0x01020304 &&\n"
+ "> +\t\t\t            regs[1] == 0x05060708);\n"
  "> +\n"
  "> +\t/* check wrap around doesn't break RA */\n"
  "> +\tasm volatile (\"mr r29,r1\\n\"\n"
@@ -160,7 +160,7 @@
  "> +\t * overwrite the register.\n"
  "> +\t * In all the cases, the register must stay untouched\n"
  "> +\t */\n"
- "> +\treport(\"Don't overwrite Ra\", regs[2] = (uint64_t)addr);\n"
+ "> +\treport(\"Don't overwrite Ra\", regs[2] == (uint64_t)addr);\n"
  "> +\n"
  "> +\treport_prefix_pop();\n"
  "> +}\n"
@@ -178,4 +178,4 @@
  ">  \n"
  >
 
-d5d52b8f52123679f0c5737ce8821c0c300fc7750a1c690e340fdd4f1c6c0b7d
+f6ffde36ddf72c16c5bae442f05d2efad46431c2034544751d2c52c722aab522

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