From mboxrd@z Thu Jan 1 00:00:00 1970 From: Krzysztof Kozlowski Subject: Re: [PATCH] ARM: EXYNOS: set clock parents of registered clocks on power-on Date: Fri, 22 Apr 2016 08:55:07 +0200 Message-ID: <5719CACB.2060702@samsung.com> References: <1461270297-31390-1-git-send-email-vz@mleia.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Return-path: Received: from mailout3.w1.samsung.com ([210.118.77.13]:51254 "EHLO mailout3.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751863AbcDVGzM (ORCPT ); Fri, 22 Apr 2016 02:55:12 -0400 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout3.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0O60000ASWJW3150@mailout3.w1.samsung.com> for linux-samsung-soc@vger.kernel.org; Fri, 22 Apr 2016 07:55:08 +0100 (BST) In-reply-to: <1461270297-31390-1-git-send-email-vz@mleia.com> Sender: linux-samsung-soc-owner@vger.kernel.org List-Id: linux-samsung-soc@vger.kernel.org To: Vladimir Zapolskiy , Kukjin Kim Cc: Russell King , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org On 04/21/2016 10:24 PM, Vladimir Zapolskiy wrote: > If any of the clocks from stored on power down list are not registered > by chance, on power-on the for-loop of reassigning the clock parents > back from "oscclk" exits and the remaining clocks don't have a chance > to restore an original parent clock. > > Fixes: 29e5eea06bc1 ("ARM: EXYNOS: Get current parent clock for power domain on/off") > Signed-off-by: Vladimir Zapolskiy > --- > Hi Krzysztof, > > this is a functional and _untested_ change, but I hope it is okay, > please review. Here "if (a) break; if (a) continue;" code is quite > confusing. > > arch/arm/mach-exynos/pm_domains.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c > index 7c21760..6a9993e 100644 > --- a/arch/arm/mach-exynos/pm_domains.c > +++ b/arch/arm/mach-exynos/pm_domains.c > @@ -90,9 +90,6 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) > if (power_on) { > for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { > if (IS_ERR(pd->clk[i])) > - break; > - > - if (IS_ERR(pd->clk[i])) > continue; /* Skip on first power up */ Nice finding! It looks like my mistake during rebasing (automatic conflict resolution). Anyway I am pretty sure that idea was here to continue on pd->pclk (not clk) error. I will confirm this and send appropriate patch with your reported-by. Best regards, Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 From: k.kozlowski@samsung.com (Krzysztof Kozlowski) Date: Fri, 22 Apr 2016 08:55:07 +0200 Subject: [PATCH] ARM: EXYNOS: set clock parents of registered clocks on power-on In-Reply-To: <1461270297-31390-1-git-send-email-vz@mleia.com> References: <1461270297-31390-1-git-send-email-vz@mleia.com> Message-ID: <5719CACB.2060702@samsung.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 04/21/2016 10:24 PM, Vladimir Zapolskiy wrote: > If any of the clocks from stored on power down list are not registered > by chance, on power-on the for-loop of reassigning the clock parents > back from "oscclk" exits and the remaining clocks don't have a chance > to restore an original parent clock. > > Fixes: 29e5eea06bc1 ("ARM: EXYNOS: Get current parent clock for power domain on/off") > Signed-off-by: Vladimir Zapolskiy > --- > Hi Krzysztof, > > this is a functional and _untested_ change, but I hope it is okay, > please review. Here "if (a) break; if (a) continue;" code is quite > confusing. > > arch/arm/mach-exynos/pm_domains.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c > index 7c21760..6a9993e 100644 > --- a/arch/arm/mach-exynos/pm_domains.c > +++ b/arch/arm/mach-exynos/pm_domains.c > @@ -90,9 +90,6 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) > if (power_on) { > for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) { > if (IS_ERR(pd->clk[i])) > - break; > - > - if (IS_ERR(pd->clk[i])) > continue; /* Skip on first power up */ Nice finding! It looks like my mistake during rebasing (automatic conflict resolution). Anyway I am pretty sure that idea was here to continue on pd->pclk (not clk) error. I will confirm this and send appropriate patch with your reported-by. Best regards, Krzysztof