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diff for duplicates of <571DD80A.1030409@nvidia.com>

diff --git a/a/1.txt b/N1/1.txt
index a3c5df6..a734eda 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -2,7 +2,7 @@
 On Monday 25 April 2016 11:06 AM, Alexandre Courbot wrote:
 > Sorry, just realized I commented on v3...
 >
-> On Fri, Apr 22, 2016 at 7:09 PM, Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:
+> On Fri, Apr 22, 2016 at 7:09 PM, Laxman Dewangan <ldewangan@nvidia.com> wrote:
 >> +       spinlock_t dbc_lock[4]; /* Lock for updating debounce count register */
 > I'm nit'ing here, but maybe one spinlock shared by all ports would be
 > enough? (the same would apply to lvl_lock, so feel free to do this as
diff --git a/a/content_digest b/N1/content_digest
index 1881868..f5461f9 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,24 +1,23 @@
  "ref\01461319754-12040-1-git-send-email-ldewangan@nvidia.com\0"
  "ref\01461319754-12040-4-git-send-email-ldewangan@nvidia.com\0"
  "ref\0CAAVeFuJykGNGj95r4P8vatxOA_yjsP1eQkDf9zS-dYV1piHTJA@mail.gmail.com\0"
- "ref\0CAAVeFuJykGNGj95r4P8vatxOA_yjsP1eQkDf9zS-dYV1piHTJA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0"
- "From\0Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0"
+ "From\0Laxman Dewangan <ldewangan@nvidia.com>\0"
  "Subject\0Re: [PATCH V4 4/4] gpio: tegra: Add support for gpio debounce\0"
  "Date\0Mon, 25 Apr 2016 14:10:42 +0530\0"
- "To\0Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0"
- "Cc\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>"
-  Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
-  Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
-  linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
-  linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
- " Linux Kernel Mailing List <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>\0"
+ "To\0Alexandre Courbot <gnurou@gmail.com>\0"
+ "Cc\0Stephen Warren <swarren@wwwdotorg.org>"
+  Linus Walleij <linus.walleij@linaro.org>
+  Thierry Reding <thierry.reding@gmail.com>
+  linux-gpio@vger.kernel.org <linux-gpio@vger.kernel.org>
+  linux-tegra@vger.kernel.org <linux-tegra@vger.kernel.org>
+ " Linux Kernel Mailing List <linux-kernel@vger.kernel.org>\0"
  "\00:1\0"
  "b\0"
  "\n"
  "On Monday 25 April 2016 11:06 AM, Alexandre Courbot wrote:\n"
  "> Sorry, just realized I commented on v3...\n"
  ">\n"
- "> On Fri, Apr 22, 2016 at 7:09 PM, Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:\n"
+ "> On Fri, Apr 22, 2016 at 7:09 PM, Laxman Dewangan <ldewangan@nvidia.com> wrote:\n"
  ">> +       spinlock_t dbc_lock[4]; /* Lock for updating debounce count register */\n"
  "> I'm nit'ing here, but maybe one spinlock shared by all ports would be\n"
  "> enough? (the same would apply to lvl_lock, so feel free to do this as\n"
@@ -45,4 +44,4 @@
  "OK, this also looks fine. As I am goign to respin this for V5 (for gc as \n"
  instance rather than pointer), I will take care of it.
 
-2a6ff5ce4cdf30e02c50cb1bd6d751b982bd2fc7d51891a1ae84babd0b3e8b20
+e0f873a4f124d5291e33b264a27232e4169d688ca4fcb5e36fd7d07113e5e38e

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