diff for duplicates of <571DEF30.90604@rock-chips.com> diff --git a/a/1.txt b/N1/1.txt index 1bcae35..b937340 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,15 +1,15 @@ Hi, Mark: -On 2016年04月25日 18:05, Mark Rutland wrote: +On 2016?04?25? 18:05, Mark Rutland wrote: > On Mon, Apr 25, 2016 at 05:48:51PM +0800, Huang, Tao wrote: >> Hi, Marc: ->> On 2016年04月21日 19:30, Marc Zyngier wrote: +>> On 2016?04?21? 19:30, Marc Zyngier wrote: >>> On Thu, 21 Apr 2016 18:47:20 +0800 >>> "Huang, Tao" <huangtao@rock-chips.com> wrote: >>> >>>> Hi, Mark: ->>>> On 2016年04月21日 18:19, Mark Rutland wrote: +>>>> On 2016?04?21? 18:19, Mark Rutland wrote: >>>>> On Thu, Apr 21, 2016 at 11:58:12AM +0800, Jianqun Xu wrote: ->>>>>> + cpu_l0: cpu@0 { +>>>>>> + cpu_l0: cpu at 0 { >>>>>> + device_type = "cpu"; >>>>>> + compatible = "arm,cortex-a53", "arm,armv8"; >>>>>> + reg = <0x0 0x0>; @@ -17,7 +17,7 @@ On 2016年04月25日 18:05, Mark Rutland wrote: >>>>>> + #cooling-cells = <2>; /* min followed by max */ >>>>>> + clocks = <&cru ARMCLKL>; >>>>>> + }; ->>>>>> + cpu_b0: cpu@100 { +>>>>>> + cpu_b0: cpu at 100 { >>>>>> + device_type = "cpu"; >>>>>> + compatible = "arm,cortex-a72", "arm,armv8"; >>>>>> + reg = <0x0 0x100>; @@ -75,7 +75,7 @@ On 2016年04月25日 18:05, Mark Rutland wrote: >> drivers/irqchip/irq-gic-v3.c >> and change rk3399.dtsi base on your arm,gic-v3.txt: >> ->> gic: interrupt-controller@fee00000 { +>> gic: interrupt-controller at fee00000 { >> compatible = "arm,gic-v3"; >> - #interrupt-cells = <3>; >> + #interrupt-cells = <4>; @@ -94,7 +94,7 @@ On 2016年04月25日 18:05, Mark Rutland wrote: >> + }; >> >> and change every interrupts from three cells to four cells, such as ->> saradc: saradc@ff100000 { +>> saradc: saradc at ff100000 { >> compatible = "rockchip,rk3399-saradc"; >> reg = <0x0 0xff100000 0x0 0x100>; >> - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; diff --git a/a/content_digest b/N1/content_digest index 81901e7..5f683b0 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -5,41 +5,24 @@ "ref\020160421123018.096d4a75@arm.com\0" "ref\0571DE803.3010902@rock-chips.com\0" "ref\020160425100531.GC25087@leverpostej\0" - "From\0Huang, Tao <huangtao@rock-chips.com>\0" - "Subject\0Re: [PATCH] ARM64: dts: rockchip: add core dtsi file for RK3399 SoCs\0" + "From\0huangtao@rock-chips.com (Huang, Tao)\0" + "Subject\0[PATCH] ARM64: dts: rockchip: add core dtsi file for RK3399 SoCs\0" "Date\0Mon, 25 Apr 2016 18:19:28 +0800\0" - "To\0Mark Rutland <mark.rutland@arm.com>\0" - "Cc\0Marc Zyngier <marc.zyngier@arm.com>" - devicetree@vger.kernel.org - davidriley@chromium.org - heiko@sntech.de - pawel.moll@arm.com - ijc+devicetree@hellion.org.uk - catalin.marinas@arm.com - will.deacon@arm.com - dianders@chromium.org - smbarber@chromium.org - linux-rockchip@lists.infradead.org - robh+dt@kernel.org - galak@codeaurora.org - jwerner@chromium.org - linux-kernel@vger.kernel.org - Jianqun Xu <jay.xu@rock-chips.com> - " linux-arm-kernel@lists.infradead.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Hi, Mark:\n" - "On 2016\345\271\26404\346\234\21025\346\227\245 18:05, Mark Rutland wrote:\n" + "On 2016?04?25? 18:05, Mark Rutland wrote:\n" "> On Mon, Apr 25, 2016 at 05:48:51PM +0800, Huang, Tao wrote:\n" ">> Hi, Marc:\n" - ">> On 2016\345\271\26404\346\234\21021\346\227\245 19:30, Marc Zyngier wrote:\n" + ">> On 2016?04?21? 19:30, Marc Zyngier wrote:\n" ">>> On Thu, 21 Apr 2016 18:47:20 +0800\n" ">>> \"Huang, Tao\" <huangtao@rock-chips.com> wrote:\n" ">>>\n" ">>>> Hi, Mark:\n" - ">>>> On 2016\345\271\26404\346\234\21021\346\227\245 18:19, Mark Rutland wrote:\n" + ">>>> On 2016?04?21? 18:19, Mark Rutland wrote:\n" ">>>>> On Thu, Apr 21, 2016 at 11:58:12AM +0800, Jianqun Xu wrote:\n" - ">>>>>> +\t\tcpu_l0: cpu@0 {\n" + ">>>>>> +\t\tcpu_l0: cpu at 0 {\n" ">>>>>> +\t\t\tdevice_type = \"cpu\";\n" ">>>>>> +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" ">>>>>> +\t\t\treg = <0x0 0x0>;\n" @@ -47,7 +30,7 @@ ">>>>>> +\t\t\t#cooling-cells = <2>; /* min followed by max */\n" ">>>>>> +\t\t\tclocks = <&cru ARMCLKL>;\n" ">>>>>> +\t\t};\n" - ">>>>>> +\t\tcpu_b0: cpu@100 {\n" + ">>>>>> +\t\tcpu_b0: cpu at 100 {\n" ">>>>>> +\t\t\tdevice_type = \"cpu\";\n" ">>>>>> +\t\t\tcompatible = \"arm,cortex-a72\", \"arm,armv8\";\n" ">>>>>> +\t\t\treg = <0x0 0x100>;\n" @@ -105,7 +88,7 @@ ">> drivers/irqchip/irq-gic-v3.c\n" ">> and change rk3399.dtsi base on your arm,gic-v3.txt:\n" ">>\n" - ">> gic: interrupt-controller@fee00000 {\n" + ">> gic: interrupt-controller at fee00000 {\n" ">> compatible = \"arm,gic-v3\";\n" ">> - #interrupt-cells = <3>;\n" ">> + #interrupt-cells = <4>;\n" @@ -124,7 +107,7 @@ ">> + };\n" ">>\n" ">> and change every interrupts from three cells to four cells, such as\n" - ">> saradc: saradc@ff100000 {\n" + ">> saradc: saradc at ff100000 {\n" ">> compatible = \"rockchip,rk3399-saradc\";\n" ">> reg = <0x0 0xff100000 0x0 0x100>;\n" ">> - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -200,4 +183,4 @@ "Thanks,\n" Huang Tao -983a4dd35d1ccc13b22314d30af728b9986ed233817fd0d36a01b44c07ef1434 +64c0c4c7d839c609696db1890adaa16a0899f67e98fbd404583763e2b884b3c8
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