From mboxrd@z Thu Jan 1 00:00:00 1970 From: lars@metafoo.de (Lars-Peter Clausen) Date: Wed, 27 Apr 2016 09:11:46 +0200 Subject: [PATCH v7 1/2] Documentation: DT: dma: Add Xilinx zynqmp dma device tree binding documentation In-Reply-To: <1461740729-30715-1-git-send-email-appanad@xilinx.com> References: <1461740729-30715-1-git-send-email-appanad@xilinx.com> Message-ID: <57206632.7010508@metafoo.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 04/27/2016 09:05 AM, Kedareswara rao Appana wrote: [...] > +- xlnx,include-sg : Indicates the controller to operate in simple or > + scatter gather dma mode > +- xlnx,ratectrl : Scheduling interval in terms of clock cycles for > + source AXI transaction > +- xlnx,overfetch : Tells whether the channel is allowed to over > + fetch the data > +- xlnx,src-issue : Number of AXI outstanding transactions on source side > +- xlnx,src-burst-len : AXI length for data read. Support only power of > + 2 byte values. > +- xlnx,dst-burst-len : AXI length for data write. Support only power of These are all software runtime configuration parameters that you'd want to change at runtime depending on which peripheral you are targeting with a specific DMA transfer. These really do not belong into the devicetree. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lars-Peter Clausen Subject: Re: [PATCH v7 1/2] Documentation: DT: dma: Add Xilinx zynqmp dma device tree binding documentation Date: Wed, 27 Apr 2016 09:11:46 +0200 Message-ID: <57206632.7010508@metafoo.de> References: <1461740729-30715-1-git-send-email-appanad@xilinx.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1461740729-30715-1-git-send-email-appanad-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Kedareswara rao Appana , robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, pawel.moll-5wv7dgnIgG8@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org, galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org, soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org, vinod.koul-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org, dan.j.williams-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org, appanad-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org, moritz.fischer-+aYTwkv1SeIAvxtiuMwx3w@public.gmane.org, laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org, luis-HiykPkW1eAzzDCI4PIEvbQC/G2K4zDHf@public.gmane.org, anirudh-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org, punnaia-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org On 04/27/2016 09:05 AM, Kedareswara rao Appana wrote: [...] > +- xlnx,include-sg : Indicates the controller to operate in simple or > + scatter gather dma mode > +- xlnx,ratectrl : Scheduling interval in terms of clock cycles for > + source AXI transaction > +- xlnx,overfetch : Tells whether the channel is allowed to over > + fetch the data > +- xlnx,src-issue : Number of AXI outstanding transactions on source side > +- xlnx,src-burst-len : AXI length for data read. Support only power of > + 2 byte values. > +- xlnx,dst-burst-len : AXI length for data write. Support only power of These are all software runtime configuration parameters that you'd want to change at runtime depending on which peripheral you are targeting with a specific DMA transfer. These really do not belong into the devicetree. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753158AbcD0HMF (ORCPT ); Wed, 27 Apr 2016 03:12:05 -0400 Received: from www381.your-server.de ([78.46.137.84]:60287 "EHLO www381.your-server.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752297AbcD0HMC (ORCPT ); Wed, 27 Apr 2016 03:12:02 -0400 Subject: Re: [PATCH v7 1/2] Documentation: DT: dma: Add Xilinx zynqmp dma device tree binding documentation To: Kedareswara rao Appana , robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, michal.simek@xilinx.com, soren.brinkmann@xilinx.com, vinod.koul@intel.com, dan.j.williams@intel.com, appanad@xilinx.com, moritz.fischer@ettus.com, laurent.pinchart@ideasonboard.com, luis@debethencourt.com, anirudh@xilinx.com, punnaia@xilinx.com References: <1461740729-30715-1-git-send-email-appanad@xilinx.com> Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org From: Lars-Peter Clausen Message-ID: <57206632.7010508@metafoo.de> Date: Wed, 27 Apr 2016 09:11:46 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Icedove/38.7.0 MIME-Version: 1.0 In-Reply-To: <1461740729-30715-1-git-send-email-appanad@xilinx.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-Authenticated-Sender: lars@metafoo.de Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/27/2016 09:05 AM, Kedareswara rao Appana wrote: [...] > +- xlnx,include-sg : Indicates the controller to operate in simple or > + scatter gather dma mode > +- xlnx,ratectrl : Scheduling interval in terms of clock cycles for > + source AXI transaction > +- xlnx,overfetch : Tells whether the channel is allowed to over > + fetch the data > +- xlnx,src-issue : Number of AXI outstanding transactions on source side > +- xlnx,src-burst-len : AXI length for data read. Support only power of > + 2 byte values. > +- xlnx,dst-burst-len : AXI length for data write. Support only power of These are all software runtime configuration parameters that you'd want to change at runtime depending on which peripheral you are targeting with a specific DMA transfer. These really do not belong into the devicetree.