From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40424) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1avhhE-0007es-4l for qemu-devel@nongnu.org; Thu, 28 Apr 2016 04:53:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1avhh9-000859-GF for qemu-devel@nongnu.org; Thu, 28 Apr 2016 04:53:16 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:9806) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1avhh9-00084q-9b for qemu-devel@nongnu.org; Thu, 28 Apr 2016 04:53:11 -0400 Message-ID: <5721CF70.2010801@imgtec.com> Date: Thu, 28 Apr 2016 09:53:04 +0100 From: Leon Alrae MIME-Version: 1.0 References: <1461795666-4704-1-git-send-email-james.hogan@imgtec.com> In-Reply-To: <1461795666-4704-1-git-send-email-james.hogan@imgtec.com> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] target-mips: Fix RDHWR exception host PC List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: James Hogan Cc: qemu-devel@nongnu.org, Yongbok Kim , Aurelien Jarno , Peter Maydell On 27/04/16 23:21, James Hogan wrote: > Commit b00c72180c36 ("target-mips: add PC, XNP reg numbers to RDHWR") > changed the rdhwr helpers to use check_hwrena() to check the register > being accessed is enabled in CP0_HWREna when used from user mode. If > that check fails an EXCP_RI exception is raised at the host PC > calculated with GETPC(). > > However check_hwrena() may not be fully inlined as the > do_raise_exception() part of it is common regardless of the arguments. > This causes GETPC() to calculate the address in the call in the helper > instead of the generated code calling the helper. No TB will be found > and the EPC reported with the resulting guest RI exception points to the > beginning of the TB instead of the RDHWR instruction. > > We can't reliably force check_hwrena() to be inlined, and converting it > to a macro would be ugly, so instead pass the host PC in as an argument, > with each rdhwr helper passing GETPC(). This should avoid any dependence > on compiler behaviour, and in practice seems to prevent the partial > inlining of check_hwrena() on x86_64. > > This issue causes failures when running a MIPS KVM (trap & emulate) > guest in a MIPS QEMU TCG guest, as the inner guest kernel will do a > RDHWR of counter, which is disabled in the outer guest's CP0_HWREna by > KVM so it can emulate the inner guest's counter. The emulation fails and > the RI exception is passed to the inner guest. > > Fixes: b00c72180c36 ("target-mips: add PC, XNP reg numbers to RDHWR") > Signed-off-by: James Hogan > Cc: Leon Alrae > Cc: Yongbok Kim > Cc: Aurelien Jarno > --- > target-mips/op_helper.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) Whoops, thanks for the fix. I'll send the pullreq soon, hopefully it's not too late for 2.6. Thanks, Leon