From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/2] mtd: cqspi: Simplify indirect write code
Date: Fri, 29 Apr 2016 11:35:50 +0200 [thread overview]
Message-ID: <57232AF6.9060903@denx.de> (raw)
In-Reply-To: <1461796606-9254-1-git-send-email-marex@denx.de>
Hi Marek,
On 28.04.2016 00:36, Marek Vasut wrote:
> The indirect write code is buggy pile of nastiness which fails horribly
> when the system runs fast enough to saturate the controller. The failure
> results in some pages (256B) not being written to the flash. This can be
> observed on systems which run with Dcache enabled and L2 cache enabled,
> like the Altera SoCFPGA.
>
> This patch replaces the whole unmaintainable indirect write implementation
> with the one from upcoming Linux CQSPI driver, which went through multiple
> rounds of thorough review and testing. While this makes the patch look
> terrifying and violates all best-practices of software development, all
> the patch does is it plucks out duplicate ad-hoc code distributed across
> the driver and replaces it with more compact code doing exactly the same
> thing.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Anatolij Gustschin <agust@denx.de>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Jagan Teki <jteki@openedev.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Vignesh R <vigneshr@ti.com>
I've applied both patches and tested them on SR1500 (SPI-NOR used
for booting and redundant environment). This is what I get upon
"saveeenv":
=> saveenv
Saving Environment to SPI Flash...
SF: Detected N25Q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB
Erasing SPI flash...Writing to SPI flash...data abort
pc : [<3ff8368a>] lr : [<3ff8301b>]
reloc pc : [<010216ca>] lr : [<0102105b>]
sp : 3bf54eb8 ip : 3ff82f69 fp : 00000002
r10: 00000000 r9 : 3bf5dee8 r8 : ffff0000
r7 : 00000001 r6 : 3bf54f9b r5 : 00000001 r4 : 3bf5e520
r3 : 00000000 r2 : 3bf54f9b r1 : 00000001 r0 : ffa00000
Flags: nZCv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
resetting ...
U-Boot SPL 2016.05-rc3-00009-ge1bf9b8 (Apr 29 2016 - 11:25:46)
Any idea, what might be going wrong here?
Thanks,
Stefan
next prev parent reply other threads:[~2016-04-29 9:35 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-27 22:36 [U-Boot] [PATCH 1/2] mtd: cqspi: Simplify indirect write code Marek Vasut
2016-04-27 22:36 ` [U-Boot] [PATCH 2/2] mtd: cqspi: Simplify indirect read code Marek Vasut
2016-04-29 6:03 ` [U-Boot] [PATCH 1/2] mtd: cqspi: Simplify indirect write code Vignesh R
2016-04-29 9:35 ` Stefan Roese [this message]
2016-04-29 10:13 ` Marek Vasut
2016-05-02 15:20 ` Stefan Roese
2016-05-03 16:53 ` Marek Vasut
2016-05-03 17:00 ` Stefan Roese
2016-05-03 17:18 ` Marek Vasut
2016-05-04 8:59 ` Stefan Roese
2016-05-03 10:42 ` Pavel Machek
2016-05-03 10:46 ` Marek Vasut
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