From: Mathias Nyman <mathias.nyman@intel.com>
To: Mika Westerberg <mika.westerberg@linux.intel.com>,
Bjorn Helgaas <bhelgaas@google.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Qipeng Zha <qipeng.zha@intel.com>, Qi Zheng <qi.zheng@intel.com>,
Dave Airlie <airlied@gmail.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Lukas Wunner <lukas@wunner.de>,
Andreas Noever <andreas.noever@gmail.com>,
linux-pci@vger.kernel.org, linux-pm@vger.kernel.org
Subject: Re: [PATCH v5 0/4] PCI: Add support for suspending (including runtime) of PCIe ports
Date: Fri, 29 Apr 2016 14:46:33 +0300 [thread overview]
Message-ID: <57234999.2040202@intel.com> (raw)
In-Reply-To: <1461919919-120102-1-git-send-email-mika.westerberg@linux.intel.com>
On 29.04.2016 11:51, Mika Westerberg wrote:
> Current Linux PCI core does not do any kind of power management to PCIe
> ports. This means that we waste energy and consume laptop battery even if
> the port has nothing connected to. These patches aim to change that to the
> right direction.
>
> Previous versions of the patches can be found below:
>
> v1: http://www.spinics.net/lists/linux-pci/msg49313.html
> v2: http://www.spinics.net/lists/linux-pci/msg50167.html
> v3: http://www.spinics.net/lists/linux-pci/msg50345.html
> v4: http://www.spinics.net/lists/linux-pci/msg50665.html
>
> This assumes that recent (starting from 2015) PCIe ports are capable of
> transition to D3hot/D3cold. We add a new flag to struct pci_dev 'bridge_d3'
> that is set whenever the PCI core thinks the port can be put to D3. The
> check in pci_pm_suspend_noirq() is then extended to cover devices where
> 'bridge_d3' is set.
>
> We then add two new functions pci_bridge_d3_device_changed/removed(). These
> are used to set and clear 'bridge_d3' whenever there is a change in device
> power management policy (or if the device is removed). For example when
> userspace forbids the device to enter D3cold pci_bridge_d3_device_changed()
> will clear 'bridge_d3' of the upstream bridge.
>
> For all PCI ports where 'bridge_d3' is set we also enable and unblock
> runtime PM automatically. Only exception is when the PCIe port claims to
> support hotplug. More information about that is in the changelog of
> patch [4/4].
>
> Since this also touches xhci, I'm adding Mathias and Greg to check if the
> change looks reasonable.
>
For the non-functional one-line only xhci change in patch 2/4:
Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Out of curiosity, does enabling bridge d3 in any way impact #PME
wakeup signaling initiated by devices behind that bridge?
-Mathias
next prev parent reply other threads:[~2016-04-29 11:39 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-29 8:51 [PATCH v5 0/4] PCI: Add support for suspending (including runtime) of PCIe ports Mika Westerberg
2016-04-29 8:51 ` [PATCH v5 1/4] PCI: No need to set d3cold_allowed to " Mika Westerberg
2016-05-11 19:36 ` Bjorn Helgaas
2016-05-11 20:12 ` Rafael J. Wysocki
2016-04-29 8:51 ` [PATCH v5 2/4] PCI: Put PCIe ports into D3 during suspend Mika Westerberg
2016-05-04 21:01 ` Rafael J. Wysocki
2016-04-29 8:51 ` [PATCH v5 3/4] ACPI / hotplug / PCI: Runtime resume bridge before rescan Mika Westerberg
2016-04-29 8:51 ` [PATCH v5 4/4] PCI: Add runtime PM support for PCIe ports Mika Westerberg
2016-06-17 20:48 ` Bjorn Helgaas
2016-06-17 21:32 ` Lukas Wunner
2016-06-20 8:10 ` Mika Westerberg
2016-06-20 20:43 ` Bjorn Helgaas
2016-04-29 11:46 ` Mathias Nyman [this message]
2016-04-29 12:10 ` [PATCH v5 0/4] PCI: Add support for suspending (including runtime) of " Rafael J. Wysocki
2016-05-02 10:16 ` Mika Westerberg
2016-05-02 11:03 ` Lukas Wunner
2016-05-04 21:03 ` Rafael J. Wysocki
2016-05-11 20:18 ` Bjorn Helgaas
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