From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Hanson Subject: Re: [PATCH v2 18/54] KVM: arm/arm64: vgic-new: Add GICv3 world switch backend Date: Thu, 5 May 2016 11:04:01 -0600 Message-ID: <572B7D01.50202@linaro.org> References: <1461861973-26464-1-git-send-email-andre.przywara@arm.com> <1461861973-26464-19-git-send-email-andre.przywara@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 66B0149B6F for ; Thu, 5 May 2016 13:01:33 -0400 (EDT) Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id a8+mUMB6bENp for ; Thu, 5 May 2016 13:01:28 -0400 (EDT) Received: from mail-pa0-f52.google.com (mail-pa0-f52.google.com [209.85.220.52]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id 0134E49B42 for ; Thu, 5 May 2016 13:01:27 -0400 (EDT) Received: by mail-pa0-f52.google.com with SMTP id xk12so38164794pac.0 for ; Thu, 05 May 2016 10:04:09 -0700 (PDT) In-Reply-To: <1461861973-26464-19-git-send-email-andre.przywara@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: Andre Przywara , Marc Zyngier , Christoffer Dall Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org List-Id: kvmarm@lists.cs.columbia.edu On 04/28/2016 10:45 AM, Andre Przywara wrote: ... > diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c > new file mode 100644 > index 0000000..461229b > --- /dev/null > +++ b/virt/kvm/arm/vgic/vgic-v3.c ... > +void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu) > +{ > + struct vgic_v3_cpu_if *cpuif = &vcpu->arch.vgic_cpu.vgic_v3; > + u32 model = vcpu->kvm->arch.vgic.vgic_model; > + int lr; > + > + /* Assumes ap_list_lock held */ If truly required that ap_list_lock already be locked, then the code should enforce it. At least in dev mode. Maybe: DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vcpu->ap_list_lock)); ... > +/* Requires the irq to be locked already */ > +void vgic_v3_populate_lr(struct kvm_vcpu *vcpu, struct vgic_irq *irq, int lr) > +{ > + u32 model = vcpu->kvm->arch.vgic.vgic_model; > + u64 val = irq->intid; > + Similarly, if required then the code should enforce it. DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock)); ... From mboxrd@z Thu Jan 1 00:00:00 1970 From: thomas.hanson@linaro.org (Tom Hanson) Date: Thu, 5 May 2016 11:04:01 -0600 Subject: [PATCH v2 18/54] KVM: arm/arm64: vgic-new: Add GICv3 world switch backend In-Reply-To: <1461861973-26464-19-git-send-email-andre.przywara@arm.com> References: <1461861973-26464-1-git-send-email-andre.przywara@arm.com> <1461861973-26464-19-git-send-email-andre.przywara@arm.com> Message-ID: <572B7D01.50202@linaro.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 04/28/2016 10:45 AM, Andre Przywara wrote: ... > diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c > new file mode 100644 > index 0000000..461229b > --- /dev/null > +++ b/virt/kvm/arm/vgic/vgic-v3.c ... > +void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu) > +{ > + struct vgic_v3_cpu_if *cpuif = &vcpu->arch.vgic_cpu.vgic_v3; > + u32 model = vcpu->kvm->arch.vgic.vgic_model; > + int lr; > + > + /* Assumes ap_list_lock held */ If truly required that ap_list_lock already be locked, then the code should enforce it. At least in dev mode. Maybe: DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vcpu->ap_list_lock)); ... > +/* Requires the irq to be locked already */ > +void vgic_v3_populate_lr(struct kvm_vcpu *vcpu, struct vgic_irq *irq, int lr) > +{ > + u32 model = vcpu->kvm->arch.vgic.vgic_model; > + u64 val = irq->intid; > + Similarly, if required then the code should enforce it. DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock)); ...