From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Mon, 09 May 2016 15:06:50 +0200 (CEST) Received: from bh-25.webhostbox.net ([208.91.199.152]:43159 "EHLO bh-25.webhostbox.net" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S27028413AbcEINGpTWnhR (ORCPT ); Mon, 9 May 2016 15:06:45 +0200 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=roeck-us.net; s=default; h=Content-Transfer-Encoding:Content-Type: In-Reply-To:MIME-Version:Date:Message-ID:From:Cc:References:To:Subject; bh=taE5i8TT5+vboklpSUuTRRDudZmAgTs7um2mT4CvDWw=; b=eOaokkUSTCiZndfr/IPSu3l+YM +/40cscd3JTVXCl2WJvqQ45MroJv64bKp34eUfpL+7/0tFSed73hxGqvtApg9kZwhE1/ip7naoJjv HnaFn3uNv4WPTXlXp29OjXM0pF9OsmQ11OGrRsKQ6M2+g5pRob3/QJDIa+bR0YM+RBGAbkDk6lG70 U4qplwyKQpLOWWorCqDjOMxA17fHUYIg3bFF6dSzZ3GXCZ/56jDItN+IVRofqOnK+to5+FY5BT6a2 AsFJ2HljFuPI2ZDMWpxXE8k6qg2GUAypVJoKzkJsEHJdZ/4Y7+u0UmZU/VB4o/WBHns/nJ0qUbXKC nWiozVpw==; Received: from 108-223-40-66.lightspeed.sntcca.sbcglobal.net ([108.223.40.66]:59784 helo=server.roeck-us.net) by bh-25.webhostbox.net with esmtpsa (TLSv1:DHE-RSA-AES128-SHA:128) (Exim 4.86_1) (envelope-from ) id 1azksv-001i25-Vq; Mon, 09 May 2016 13:06:08 +0000 Subject: Re: [PATCH (v5) 3/11] MIPS: bmips: Add bcm6345-l2-timer interrupt controller To: =?UTF-8?Q?=c3=81lvaro_Fern=c3=a1ndez_Rojas?= , Simon Arlott , Thomas Gleixner References: <5650BFD6.5030700@simon.arlott.org.uk> <5653612A.4050309@simon.arlott.org.uk> <565361AF.20400@simon.arlott.org.uk> <70d031ae4c3aa29888d77b64686c39e7e7eaae92@8b5064a13e22126c1b9329f0dc35b8915774b7c3.invalid> <5654E67A.9060800@gmail.com> <5657886F.3090908@simon.arlott.org.uk> <56599D73.7040801@simon.arlott.org.uk> <565CE85A.3080904@roeck-us.net> <256BE4660FB03085.33070B6A-E0AC-4643-92B8-4FD874210CD9@mail.outlook.com> Cc: Ralf Baechle , Linux Kernel Mailing List , Mark Rutland , Florian Fainelli , Kumar Gala , Kevin Cernekee , MIPS Mailing List , Wim Van Sebroeck , Miguel Gaio , Marc Zyngier , Jonas Gorski , Pawel Moll , Rob Herring , devicetree@vger.kernel.org, Maxime Bizon , Ian Campbell , linux-watchdog@vger.kernel.org, Jason Cooper From: Guenter Roeck Message-ID: <57308B3D.3020502@roeck-us.net> Date: Mon, 9 May 2016 06:06:05 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.7.2 MIME-Version: 1.0 In-Reply-To: <256BE4660FB03085.33070B6A-E0AC-4643-92B8-4FD874210CD9@mail.outlook.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-Authenticated_sender: linux@roeck-us.net X-OutGoing-Spam-Status: No, score=0.0 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - bh-25.webhostbox.net X-AntiAbuse: Original Domain - linux-mips.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - roeck-us.net X-Get-Message-Sender-Via: bh-25.webhostbox.net: authenticated_id: linux@roeck-us.net X-Authenticated-Sender: bh-25.webhostbox.net: linux@roeck-us.net X-Source: X-Source-Args: X-Source-Dir: Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 53308 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: linux@roeck-us.net Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips On 05/09/2016 05:01 AM, Álvaro Fernández Rojas wrote: > Hello Guenter, > > Are there any other issues preventing this patches from being merged? > My major problem/concern is the interrupt handling and the repeated restart of the hardware timer with continuously reduced timeouts. This appears fragile, and it doesn't really make sense from a system level point of view. Unfortunately, I don't have a data sheet for the chip, nor the means or the time to test it myself. So we are pretty much in limbo, unless someone from Broadcom confirms that, yes, this is the one and expected means to program this watchdog. Guenter > Regards, > Álvaro. > _____________________________ > From: Guenter Roeck > > Sent: martes, diciembre 1, 2015 1:23 a. m. > Subject: Re: [PATCH (v5) 3/11] MIPS: bmips: Add bcm6345-l2-timer interrupt controller > To: Simon Arlott >, Thomas Gleixner > > Cc: Ralf Baechle >, Linux Kernel Mailing List >, Mark Rutland >, Florian Fainelli >, Ian Campbell >, Kevin Cernekee >, MIPS Mailing List >, Kumar Gala >, Miguel Gaio >, Jonas Gorski >, Marc Zyngier >, Pawel Moll >, Rob Herring >, >, Maxime > Bizon >, Wim Van Sebroeck >, >, Jason Cooper > > > > On 11/28/2015 04:26 AM, Simon Arlott wrote: > > Add the BCM6345/BCM6318 timer as an interrupt controller so that it can be > > used by the watchdog to warn that its timer will expire soon. > > > > Support for clocksource/clockevents is not implemented as the timer > > interrupt is not per CPU (except on the BCM6318) and the MIPS clock is > > better. This could be added later if required without changing the device > > tree binding. > > > > Signed-off-by: Simon Arlott > > > Hi Simon, > > can you please re-send the entire series, with all Acked-by:/Reviewed-by: > tags as appropriate ? > > Thanks, > Guenter > > > > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Guenter Roeck Subject: Re: [PATCH (v5) 3/11] MIPS: bmips: Add bcm6345-l2-timer interrupt controller Date: Mon, 9 May 2016 06:06:05 -0700 Message-ID: <57308B3D.3020502@roeck-us.net> References: <5650BFD6.5030700@simon.arlott.org.uk> <5653612A.4050309@simon.arlott.org.uk> <565361AF.20400@simon.arlott.org.uk> <70d031ae4c3aa29888d77b64686c39e7e7eaae92@8b5064a13e22126c1b9329f0dc35b8915774b7c3.invalid> <5654E67A.9060800@gmail.com> <5657886F.3090908@simon.arlott.org.uk> <56599D73.7040801@simon.arlott.org.uk> <565CE85A.3080904@roeck-us.net> <256BE4660FB03085.33070B6A-E0AC-4643-92B8-4FD874210CD9@mail.outlook.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: In-Reply-To: <256BE4660FB03085.33070B6A-E0AC-4643-92B8-4FD874210CD9-jAs8HypviEooOQlpcoRfSA@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: =?UTF-8?Q?=c3=81lvaro_Fern=c3=a1ndez_Rojas?= , Simon Arlott , Thomas Gleixner Cc: Ralf Baechle , Linux Kernel Mailing List , Mark Rutland , Florian Fainelli , Kumar Gala , Kevin Cernekee , MIPS Mailing List , Wim Van Sebroeck , Miguel Gaio , Marc Zyngier , Jonas Gorski , Pawel Moll , Rob Herring , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Maxime Bizon , Ian Campbell , linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Jason Cooper List-Id: devicetree@vger.kernel.org On 05/09/2016 05:01 AM, =C3=81lvaro Fern=C3=A1ndez Rojas wrote: > Hello Guenter, > > Are there any other issues preventing this patches from being merged? > My major problem/concern is the interrupt handling and the repeated restart of the hardware timer with continuously reduced timeouts. This appears fragile, and it doesn't really make sense from a system level point of view. Unfortunately, I don't have a data sheet for the chip, nor the means or the time to test it myself. So we are pretty much in limbo, unless someone from Broadcom confirms that, yes, this is the one and expected means to program this watchdog. Guenter > Regards, > =C3=81lvaro. > _____________________________ > From: Guenter Roeck > > Sent: martes, diciembre 1, 2015 1:23 a. m. > Subject: Re: [PATCH (v5) 3/11] MIPS: bmips: Add bcm6345-l2-timer inte= rrupt controller > To: Simon Arlott >, Thom= as Gleixner > > Cc: Ralf Baechle >, = Linux Kernel Mailing List >, Mark Rutland >, Florian Fainelli >, Ian Campbell >, Kevin Cernekee >, MIPS Mailing List >, Kumar Gala >, Miguel Gaio >, Jonas Gorski >, Marc Zyngier >, Pawel Moll >, Rob Herring >, >, Maxime > Bizon >, Wim Van Sebroec= k >, >, Jason Cooper > > > > On 11/28/2015 04:26 AM, Simon Arlott wrote: > > Add the BCM6345/BCM6318 timer as an interrupt controller so that i= t can be > > used by the watchdog to warn that its timer will expire soon. > > > > Support for clocksource/clockevents is not implemented as the time= r > > interrupt is not per CPU (except on the BCM6318) and the MIPS cloc= k is > > better. This could be added later if required without changing the= device > > tree binding. > > > > Signed-off-by: Simon Arlott > > > Hi Simon, > > can you please re-send the entire series, with all Acked-by:/Reviewed= -by: > tags as appropriate ? > > Thanks, > Guenter > > > > -- To unsubscribe from this list: send the line "unsubscribe devicetree" i= n the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html