diff for duplicates of <573119F9.3040509@broadcom.com> diff --git a/a/1.txt b/N1/1.txt index 5bafbe7..6d0d97f 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,12 +1,12 @@ On 05/09/2016 12:26 PM, Rob Herring wrote: > On Thu, May 05, 2016 at 12:14:59PM -0700, Florian Fainelli wrote: ->> From: Jim Quinlan <jim2101024@gmail.com> +>> From: Jim Quinlan <jim2101024-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> >> >> This patchs adds the Device Tree bindings for the Broadcom STB PCIe root >> complex hardware. >> ->> Signed-off-by: Jim Quinlan <jim2101024@gmail.com> ->> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +>> Signed-off-by: Jim Quinlan <jim2101024-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> +>> Signed-off-by: Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> >> --- >> Changes in v2: >> @@ -102,7 +102,7 @@ property of the root complex node since the two are conflated. >> +This example assumes that the top-level #address-cells = <2> and #size-cells = >> +<2>, e.g: ARM LPAE configuration. >> + ->> + pcie0: pcie-controller at f0460000 { +>> + pcie0: pcie-controller@f0460000 { >> + reg = <0x0 0xf0460000 0x0 0x9310>; >> + interrupts = <0x0 0x33 0x4>, <0x0 0x34, 0x4>; > ^ @@ -145,3 +145,7 @@ can certainly drop that, since a) this is optional and b) we need to rework that in the driver anyway. -- Florian +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index 7e5a6a7..2acff89 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,21 +1,30 @@ "ref\01462475700-1654-1-git-send-email-f.fainelli@gmail.com\0" "ref\01462475700-1654-2-git-send-email-f.fainelli@gmail.com\0" "ref\020160509192641.GA4936@rob-hp-laptop\0" - "From\0florian.fainelli@broadcom.com (Florian Fainelli)\0" - "Subject\0[PATCH v2 1/2] Documentation: DT: bindings: Add Broadcom STB PCIe bindings\0" + "From\0Florian Fainelli <florian.fainelli-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>\0" + "Subject\0Re: [PATCH v2 1/2] Documentation: DT: bindings: Add Broadcom STB PCIe bindings\0" "Date\0Mon, 9 May 2016 16:15:05 -0700\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>" + " Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "Cc\0linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org + jim2101024-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org + bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org + " arnd-r2nGTMty4D4@public.gmane.org\0" "\00:1\0" "b\0" "On 05/09/2016 12:26 PM, Rob Herring wrote:\n" "> On Thu, May 05, 2016 at 12:14:59PM -0700, Florian Fainelli wrote:\n" - ">> From: Jim Quinlan <jim2101024@gmail.com>\n" + ">> From: Jim Quinlan <jim2101024-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" ">>\n" ">> This patchs adds the Device Tree bindings for the Broadcom STB PCIe root\n" ">> complex hardware.\n" ">>\n" - ">> Signed-off-by: Jim Quinlan <jim2101024@gmail.com>\n" - ">> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>\n" + ">> Signed-off-by: Jim Quinlan <jim2101024-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" + ">> Signed-off-by: Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" ">> ---\n" ">> Changes in v2:\n" ">>\n" @@ -111,7 +120,7 @@ ">> +This example assumes that the top-level #address-cells = <2> and #size-cells =\n" ">> +<2>, e.g: ARM LPAE configuration.\n" ">> +\n" - ">> +\tpcie0: pcie-controller at f0460000 {\n" + ">> +\tpcie0: pcie-controller@f0460000 {\n" ">> +\t\treg = <0x0 0xf0460000 0x0 0x9310>;\n" ">> +\t\tinterrupts = <0x0 0x33 0x4>, <0x0 0x34, 0x4>;\n" "> ^\n" @@ -153,6 +162,10 @@ "can certainly drop that, since a) this is optional and b) we need to\n" "rework that in the driver anyway.\n" "-- \n" - Florian + "Florian\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -b137231be7eb1de79735484c07399eb3f1f818bc4c506537c5ebccb14cc113f5 +4008717a9a07732eb730b71c8b27ef77deed7c7852ecee5482aed5186b45d5d2
diff --git a/a/1.txt b/N2/1.txt index 5bafbe7..4be9dbb 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -102,7 +102,7 @@ property of the root complex node since the two are conflated. >> +This example assumes that the top-level #address-cells = <2> and #size-cells = >> +<2>, e.g: ARM LPAE configuration. >> + ->> + pcie0: pcie-controller at f0460000 { +>> + pcie0: pcie-controller@f0460000 { >> + reg = <0x0 0xf0460000 0x0 0x9310>; >> + interrupts = <0x0 0x33 0x4>, <0x0 0x34, 0x4>; > ^ diff --git a/a/content_digest b/N2/content_digest index 7e5a6a7..68a0bd3 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,10 +1,19 @@ "ref\01462475700-1654-1-git-send-email-f.fainelli@gmail.com\0" "ref\01462475700-1654-2-git-send-email-f.fainelli@gmail.com\0" "ref\020160509192641.GA4936@rob-hp-laptop\0" - "From\0florian.fainelli@broadcom.com (Florian Fainelli)\0" - "Subject\0[PATCH v2 1/2] Documentation: DT: bindings: Add Broadcom STB PCIe bindings\0" + "From\0Florian Fainelli <florian.fainelli@broadcom.com>\0" + "Subject\0Re: [PATCH v2 1/2] Documentation: DT: bindings: Add Broadcom STB PCIe bindings\0" "Date\0Mon, 9 May 2016 16:15:05 -0700\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Rob Herring <robh@kernel.org>" + " Florian Fainelli <f.fainelli@gmail.com>\0" + "Cc\0linux-pci@vger.kernel.org" + linux-kernel@vger.kernel.org + devicetree@vger.kernel.org + linux-arm-kernel@lists.infradead.org + bcm-kernel-feedback-list@broadcom.com + jim2101024@gmail.com + bhelgaas@google.com + " arnd@arndb.de\0" "\00:1\0" "b\0" "On 05/09/2016 12:26 PM, Rob Herring wrote:\n" @@ -111,7 +120,7 @@ ">> +This example assumes that the top-level #address-cells = <2> and #size-cells =\n" ">> +<2>, e.g: ARM LPAE configuration.\n" ">> +\n" - ">> +\tpcie0: pcie-controller at f0460000 {\n" + ">> +\tpcie0: pcie-controller@f0460000 {\n" ">> +\t\treg = <0x0 0xf0460000 0x0 0x9310>;\n" ">> +\t\tinterrupts = <0x0 0x33 0x4>, <0x0 0x34, 0x4>;\n" "> ^\n" @@ -155,4 +164,4 @@ "-- \n" Florian -b137231be7eb1de79735484c07399eb3f1f818bc4c506537c5ebccb14cc113f5 +7d44caa03d61daca6759b58fd62026fc6e42c4759fdd064947d63b9aa53cd767
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