From mboxrd@z Thu Jan 1 00:00:00 1970 From: robin.murphy@arm.com (Robin Murphy) Date: Thu, 12 May 2016 18:08:41 +0100 Subject: [PATCH] arm64: Implement optimised IP checksum helpers In-Reply-To: References: <6ca77904d1eced60d86145dc5da361f3aefc6fec.1463062758.git.robin.murphy@arm.com> Message-ID: <5734B899.3040207@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Luke, On 12/05/16 16:34, Luke Starrett wrote: > Hi Robin, > > I pulled this in to a userspace test app expecting that the __uint128_t > type might cause GCC to emit 'ldp'. Seems like that was that your > intent based on your commit note. Instead I see two 64b loads (ldr Xn), > and a single 32b load (ldr Wn) for the trailing 4B. This was with > Linaro GCC 4.9-2015.06. GCC 5 happily emits ldp there, but indeed I couldn't figure out how to convince GCC 4 to do so. From a quick ferret around in the GCC Git, it looks like the relevant optimisations may have only gone in post-4.9. > Otherwise, the C cycle count looks good enough compared to the asm version. Yeah, compiling as standalone functions with GCC 5 I get 19 instructions vs. 17 for the asm, but the loop logic gets optimised out completely when ihl is a compile-time constant (e.g. inet_gro_receive()) Cheers, Robin. > > Thanks, > > Luke > > > On 5/12/2016 10:26 AM, Robin Murphy wrote: >> AArch64 is capable of 128-bit memory accesses without alignment >> restrictions, which makes it both possible and highly practical to slurp >> up a typical 20-byte IP header in just 2 loads. Implement our own >> version of ip_fast_checksum() to take advantage of that, resulting in >> considerably fewer instructions and memory accesses than the generic >> version. We can also get more optimal code generation for csum_fold() by >> defining it a slightly different way round from the generic version, so >> throw that into the mix too. >> >> Suggested-by: Luke Starrett >> Signed-off-by: Robin Murphy >> --- >> >> Having spent an evening poring over disassembler output, it turns out >> that there's really no need to drop into asm for this, hurrah! I've >> taken it for a spin on both big and little-endian, with no ill effects. >> >> arch/arm64/include/asm/checksum.h | 49 >> +++++++++++++++++++++++++++++++++++++++ >> 1 file changed, 49 insertions(+) >> create mode 100644 arch/arm64/include/asm/checksum.h >> >> diff --git a/arch/arm64/include/asm/checksum.h >> b/arch/arm64/include/asm/checksum.h >> new file mode 100644 >> index 000000000000..7e975ffce837 >> --- /dev/null >> +++ b/arch/arm64/include/asm/checksum.h >> @@ -0,0 +1,49 @@ >> +/* >> + * Copyright (C) 2016 ARM Ltd. >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> + * >> + * This program is distributed in the hope that it will be useful, >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> + * GNU General Public License for more details. >> + * >> + * You should have received a copy of the GNU General Public License >> + * along with this program. If not, see . >> + */ >> +#ifndef __ASM_CHECKSUM_H >> +#define __ASM_CHECKSUM_H >> + >> +static inline __sum16 csum_fold(__wsum csum) >> +{ >> + u32 sum = (__force u32)csum; >> + sum += (sum >> 16) | (sum << 16); >> + return ~(__force __sum16)(sum >> 16); >> +} >> +#define csum_fold csum_fold >> + >> +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) >> +{ >> + __uint128_t tmp; >> + u64 sum; >> + >> + tmp = *(const __uint128_t *)iph; >> + iph += 16; >> + ihl -= 4; >> + tmp += ((tmp >> 64) | (tmp << 64)); >> + sum = tmp >> 64; >> + do { >> + sum += *(const u32 *)iph; >> + iph += 4; >> + } while (--ihl); >> + >> + sum += ((sum >> 32) | (sum << 32)); >> + return csum_fold(sum >> 32); >> +} >> +#define ip_fast_csum ip_fast_csum >> + >> +#include >> + >> +#endif /* __ASM_CHECKSUM_H */ > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932386AbcELRIr (ORCPT ); Thu, 12 May 2016 13:08:47 -0400 Received: from foss.arm.com ([217.140.101.70]:60204 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752284AbcELRIq (ORCPT ); Thu, 12 May 2016 13:08:46 -0400 Subject: Re: [PATCH] arm64: Implement optimised IP checksum helpers To: Luke Starrett , will.deacon@arm.com, catalin.marinas@arm.com References: <6ca77904d1eced60d86145dc5da361f3aefc6fec.1463062758.git.robin.murphy@arm.com> Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com From: Robin Murphy Message-ID: <5734B899.3040207@arm.com> Date: Thu, 12 May 2016 18:08:41 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.7.2 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Luke, On 12/05/16 16:34, Luke Starrett wrote: > Hi Robin, > > I pulled this in to a userspace test app expecting that the __uint128_t > type might cause GCC to emit 'ldp'. Seems like that was that your > intent based on your commit note. Instead I see two 64b loads (ldr Xn), > and a single 32b load (ldr Wn) for the trailing 4B. This was with > Linaro GCC 4.9-2015.06. GCC 5 happily emits ldp there, but indeed I couldn't figure out how to convince GCC 4 to do so. From a quick ferret around in the GCC Git, it looks like the relevant optimisations may have only gone in post-4.9. > Otherwise, the C cycle count looks good enough compared to the asm version. Yeah, compiling as standalone functions with GCC 5 I get 19 instructions vs. 17 for the asm, but the loop logic gets optimised out completely when ihl is a compile-time constant (e.g. inet_gro_receive()) Cheers, Robin. > > Thanks, > > Luke > > > On 5/12/2016 10:26 AM, Robin Murphy wrote: >> AArch64 is capable of 128-bit memory accesses without alignment >> restrictions, which makes it both possible and highly practical to slurp >> up a typical 20-byte IP header in just 2 loads. Implement our own >> version of ip_fast_checksum() to take advantage of that, resulting in >> considerably fewer instructions and memory accesses than the generic >> version. We can also get more optimal code generation for csum_fold() by >> defining it a slightly different way round from the generic version, so >> throw that into the mix too. >> >> Suggested-by: Luke Starrett >> Signed-off-by: Robin Murphy >> --- >> >> Having spent an evening poring over disassembler output, it turns out >> that there's really no need to drop into asm for this, hurrah! I've >> taken it for a spin on both big and little-endian, with no ill effects. >> >> arch/arm64/include/asm/checksum.h | 49 >> +++++++++++++++++++++++++++++++++++++++ >> 1 file changed, 49 insertions(+) >> create mode 100644 arch/arm64/include/asm/checksum.h >> >> diff --git a/arch/arm64/include/asm/checksum.h >> b/arch/arm64/include/asm/checksum.h >> new file mode 100644 >> index 000000000000..7e975ffce837 >> --- /dev/null >> +++ b/arch/arm64/include/asm/checksum.h >> @@ -0,0 +1,49 @@ >> +/* >> + * Copyright (C) 2016 ARM Ltd. >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License version 2 as >> + * published by the Free Software Foundation. >> + * >> + * This program is distributed in the hope that it will be useful, >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> + * GNU General Public License for more details. >> + * >> + * You should have received a copy of the GNU General Public License >> + * along with this program. If not, see . >> + */ >> +#ifndef __ASM_CHECKSUM_H >> +#define __ASM_CHECKSUM_H >> + >> +static inline __sum16 csum_fold(__wsum csum) >> +{ >> + u32 sum = (__force u32)csum; >> + sum += (sum >> 16) | (sum << 16); >> + return ~(__force __sum16)(sum >> 16); >> +} >> +#define csum_fold csum_fold >> + >> +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) >> +{ >> + __uint128_t tmp; >> + u64 sum; >> + >> + tmp = *(const __uint128_t *)iph; >> + iph += 16; >> + ihl -= 4; >> + tmp += ((tmp >> 64) | (tmp << 64)); >> + sum = tmp >> 64; >> + do { >> + sum += *(const u32 *)iph; >> + iph += 4; >> + } while (--ihl); >> + >> + sum += ((sum >> 32) | (sum << 32)); >> + return csum_fold(sum >> 32); >> +} >> +#define ip_fast_csum ip_fast_csum >> + >> +#include >> + >> +#endif /* __ASM_CHECKSUM_H */ >