Re: [PATCH] clk: renesas: Provide r8a7795 FDP1 clocks

[Kieran Bingham <kieran@bingham.xyz>]

Thanks Geert,

On 17/05/16 11:25, Geert Uytterhoeven wrote:
> Hi Kieran,
> 
> On Tue, May 17, 2016 at 12:03 PM, Kieran Bingham <kieran@ksquared.org.uk> wrote:
>> Add the clocks with a parent of S2D1 for now, until the correct
>> parentage is identified
> 
> Thanks for your patch!
> 
>> --- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
>> +++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
>> @@ -128,6 +128,9 @@ static const struct cpg_core_clk r8a7795_core_clks[] __initconst = {
>>  };
>>
>>  static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
>> +       DEF_MOD("fdp1-ch2",              117,   R8A7795_CLK_S2D1),
>> +       DEF_MOD("fdp1-ch1",              118,   R8A7795_CLK_S2D1),
>> +       DEF_MOD("fdp1-ch0",              119,   R8A7795_CLK_S2D1),
> 
> I would call them "fdp1-2" etc., to match the documentation for the various
> Module Stop registers.

Ok. I've adjusted the names locally, and I'll await
confirmation/correction on the clock parents before a resubmit with
updated commit-log/sign-off.

I presume patches can be integrated as soon as they are wholly
independent? i.e. this update, and the DTS updates for the FDP1, then
the FDP1 driver itself? or would it be preferred to batch the whole lot
up into one set?

Possibly just as well to keep the DT, and driver close together...

> Apart from that:
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds
> 

-- 
Regards

Kieran Bingham