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From: Paolo Bonzini <pbonzini@redhat.com>
To: "Eduardo Habkost" <ehabkost@redhat.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>
Cc: qemu-devel@nongnu.org, "Lan, Tianyu" <tianyu.lan@intel.com>,
	Igor Mammedov <imammedo@redhat.com>,
	Jan Kiszka <jan.kiszka@web.de>, Peter Xu <peterx@redhat.com>,
	Richard Henderson <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH 2/4] intel_iommu: use deliver_msi APIC callback
Date: Tue, 17 May 2016 15:09:49 +0200	[thread overview]
Message-ID: <573B181D.1000604@redhat.com> (raw)
In-Reply-To: <20160513173307.GP4457@thinpad.lan.raisama.net>



On 13/05/2016 19:33, Eduardo Habkost wrote:
> On Fri, May 06, 2016 at 10:53:46PM +0200, Radim Krčmář wrote:
>> The memory-mapped interface cannot express x2APIC destinations that are
>> a result of remapping.
>>
>> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
>> ---
>>  hw/i386/intel_iommu.c | 29 ++++++++++++++++++-----------
>>  1 file changed, 18 insertions(+), 11 deletions(-)
>>
>> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
>> index bee85e469477..d10064289551 100644
>> --- a/hw/i386/intel_iommu.c
>> +++ b/hw/i386/intel_iommu.c
>> @@ -26,6 +26,7 @@
>>  #include "hw/pci/pci.h"
>>  #include "hw/boards.h"
>>  #include "hw/i386/x86-iommu.h"
>> +#include "hw/i386/apic_internal.h"
>>  
>>  /*#define DEBUG_INTEL_IOMMU*/
>>  #ifdef DEBUG_INTEL_IOMMU
>> @@ -268,24 +269,33 @@ static void vtd_update_iotlb(IntelIOMMUState *s, uint16_t source_id,
>>      g_hash_table_replace(s->iotlb, key, entry);
>>  }
>>  
>> +static void apic_deliver_msi(MSIMessage *msi)
>> +{
>> +    /* Conjure apic-bound msi delivery out of thin air. */
>> +    X86CPU *cpu = X86_CPU(first_cpu);
>> +    APICCommonState *apic_state = APIC_COMMON(cpu->apic_state);
>> +    APICCommonClass *apic_class = APIC_COMMON_GET_CLASS(apic_state);
> 
> I see a pattern here:
> 
> hw/i386/kvmvapic.c-static void do_vapic_enable(void *data)
> hw/i386/kvmvapic.c-{
> [...]
> hw/i386/kvmvapic.c-    X86CPU *cpu = X86_CPU(first_cpu);
> [...]
> hw/i386/kvmvapic.c:    apic_enable_vapic(cpu->apic_state, s->vapic_paddr);
> [...]

Here first_cpu is just the CPU that do_vapic_enable is being called on
(via run_on_cpu).  So this one can use the posted patch that passes a
CPUState* to run_on_cpu callbacks.


> hw/i386/pc.c-static void pic_irq_request(void *opaque, int irq, int level)
> hw/i386/pc.c-{
> hw/i386/pc.c-    CPUState *cs = first_cpu;
> hw/i386/pc.c-    X86CPU *cpu = X86_CPU(cs);
> [...]
> hw/i386/pc.c:    if (cpu->apic_state) {
> [...]
> 
> 
> Time to write a common pc_get_first_apic() helper, or provide a
> PCMachineState::first_apic field?

For this one, we could add a pc_get_apic_class() helper that returns
NULL if there is no APIC on the first_cpu.  It wouldn't be a change for
this code and would be nicer for Radim's use case.

Paolo

  reply	other threads:[~2016-05-17 13:10 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-06 20:53 [Qemu-devel] [RFC 0/4] APIC, IOMMU, KVM: add x2APIC interface Radim Krčmář
2016-05-06 20:53 ` [Qemu-devel] [PATCH 1/4] apic: add deliver_msi to APICCommonClass Radim Krčmář
2016-05-07 13:50   ` Jan Kiszka
2016-05-13 17:17   ` Eduardo Habkost
2016-05-06 20:53 ` [Qemu-devel] [PATCH 2/4] intel_iommu: use deliver_msi APIC callback Radim Krčmář
2016-05-13 17:33   ` Eduardo Habkost
2016-05-17 13:09     ` Paolo Bonzini [this message]
2016-05-17 13:53       ` Eduardo Habkost
2016-05-17 16:43         ` Paolo Bonzini
2016-05-06 20:53 ` [Qemu-devel] [PATCH 3/4] linux_headers: add MSI_X2APIC Radim Krčmář
2016-05-09  7:20   ` Peter Xu
2016-05-06 20:53 ` [Qemu-devel] [PATCH 4/4] kvm: support MSI_X2APIC capability Radim Krčmář
2016-05-07 14:03   ` Jan Kiszka
2016-05-09 15:08     ` Radim Krčmář
2016-05-17 13:13   ` Paolo Bonzini
2016-05-09  5:36 ` [Qemu-devel] [RFC 0/4] APIC, IOMMU, KVM: add x2APIC interface Peter Xu
2016-05-09 14:35   ` Radim Krčmář
2016-05-10  8:07     ` Peter Xu

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