diff for duplicates of <573DBAA5.2070706@samsung.com> diff --git a/a/1.txt b/N1/1.txt index 9bcaa81..42936c6 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -150,7 +150,7 @@ But we need to consider all possibilities.. > set. When a command is successfully loaded, the DWC_mobile_storage > clears this bit, unless the DWC_mobile_storage already has another > command in the queue, at which point it gives an HLE (Hardware Locked -> Error); for details on HLEs, refer to “Error Handling” on page 233. +> Error); for details on HLEs, refer to ?Error Handling? on page 233. > Software should look for the start_cmd and the Update_clk_regs_only > bits, and should also set the wait_prvdata_complete bit to ensure that > clock parameters do not change during data transfer. diff --git a/a/content_digest b/N1/content_digest index 05ad459..ce1868b 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -10,20 +10,10 @@ "ref\0573C3283.1040606@rock-chips.com\0" "ref\0CAD=FV=UoT2GRYWJWXEn_ccvKGgC+PzQM_BCtLHAa7jxzbaQ9SA@mail.gmail.com\0" "ref\010b3dc0e-aebf-664b-b36b-c54692cd9983@rock-chips.com\0" - "From\0Jaehoon Chung <jh80.chung@samsung.com>\0" - "Subject\0Re: [PATCH] mmc: dw_mmc: Consider HLE errors to be data and command errors\0" + "From\0jh80.chung@samsung.com (Jaehoon Chung)\0" + "Subject\0[PATCH] mmc: dw_mmc: Consider HLE errors to be data and command errors\0" "Date\0Thu, 19 May 2016 22:07:49 +0900\0" - "To\0Shawn Lin <shawn.lin@rock-chips.com>" - " Doug Anderson <dianders@chromium.org>\0" - "Cc\0Ulf Hansson <ulf.hansson@linaro.org>" - Alim Akhtar <alim.akhtar@samsung.com> - Sonny Rao <sonnyrao@chromium.org> - Heiko Stuebner <heiko@sntech.de> - Alexandru Stan <amstan@chromium.org> - open list:ARM/Rockchip SoC... <linux-rockchip@lists.infradead.org> - linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> - linux-mmc@vger.kernel.org <linux-mmc@vger.kernel.org> - " linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 05/19/2016 08:31 PM, Shawn Lin wrote:\n" @@ -178,7 +168,7 @@ "> set. When a command is successfully loaded, the DWC_mobile_storage\n" "> clears this bit, unless the DWC_mobile_storage already has another\n" "> command in the queue, at which point it gives an HLE (Hardware Locked\n" - "> Error); for details on HLEs, refer to \342\200\234Error Handling\342\200\235 on page 233.\n" + "> Error); for details on HLEs, refer to ?Error Handling? on page 233.\n" "> Software should look for the start_cmd and the Update_clk_regs_only\n" "> bits, and should also set the wait_prvdata_complete bit to ensure that\n" "> clock parameters do not change during data transfer.\n" @@ -210,4 +200,4 @@ "> \n" > -afda522dc3514048978ebc47a81cd54dd62b20e2b81cf0171e0de9587a99de77 +d9ec327b1d07e32e3a489c38b24bd45c12fc70f5c173fb1ea53855b115e8634f
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