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From: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
To: Ian Munsie <imunsie@au1.ibm.com>,
	Michael Ellerman <mpe@ellerman.id.au>, mikey <mikey@neuling.org>,
	linuxppc-dev@lists.ozlabs.org,
	Frederic Barrat <frederic.barrat@fr.ibm.com>,
	Huy Nguyen <huyn@mellanox.com>
Subject: Re: [PATCH] cxl: Abstract the differences between the PSL and XSL
Date: Fri, 27 May 2016 14:48:02 +0200	[thread overview]
Message-ID: <57484202.1050603@linux.vnet.ibm.com> (raw)
In-Reply-To: <1464025158-23849-1-git-send-email-imunsie@au.ibm.com>

Hi Ian,

It looks good, just one question:

> +/* XSL registers (Mellanox CX4) */
> +static const cxl_p1_reg_t CXL_XSL_Timebase  = {0x0100};
> +static const cxl_p1_reg_t CXL_XSL_TB_CTLSTAT = {0x0108};
> +static const cxl_p1_reg_t CXL_XSL_FEC       = {0x0158};
> +static const cxl_p1_reg_t CXL_XSL_DSNCTL    = {0x0168};

Out of curiosity, in which document did you get those offsets from? I 
remember there used to be some confusion about it. All I could find was 
the internal offsets the firmware remaps those to (in xsl databook).

Feel free to grab the "From:", since the patch has evolved since I 
worked on it. I don't care.

   Fred

  reply	other threads:[~2016-05-27 12:48 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-23 17:39 [PATCH] cxl: Abstract the differences between the PSL and XSL Ian Munsie
2016-05-27 12:48 ` Frederic Barrat [this message]
2016-05-27 13:06   ` John W Walthour
     [not found] ` <20160527130754.71F7DBE03E@b03ledav005.gho.boulder.ibm.com>
2016-05-30 23:01   ` Michael Ellerman
2016-05-30 23:28     ` Andrew Donnellan
2016-06-08  5:09 ` [PATCH, RFC] cxl: Add support for CAPP DMA mode Ian Munsie
2016-06-08  7:46   ` Stewart Smith
2016-06-09  5:49   ` Stewart Smith
2016-06-21  0:40   ` [RFC] " Michael Ellerman
2016-06-21  0:40 ` cxl: Abstract the differences between the PSL and XSL Michael Ellerman

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