From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: "Cédric Le Goater" <clg@kaod.org>,
"David Gibson" <david@gibson.dropbear.id.au>
Cc: peter.maydell@linaro.org, pbonzini@redhat.com,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
bharata.rao@gmail.com
Subject: Re: [Qemu-devel] [Qemu-ppc] [PULL 04/12] ppc: tlbie, tlbia and tlbisync are HV only
Date: Thu, 2 Jun 2016 08:45:29 +0100 [thread overview]
Message-ID: <574FE419.8080201@ilande.co.uk> (raw)
In-Reply-To: <574FE228.5070008@kaod.org>
On 02/06/16 08:37, Cédric Le Goater wrote:
> On 06/02/2016 05:17 AM, David Gibson wrote:
>> On Wed, Jun 01, 2016 at 08:03:08AM +0100, Mark Cave-Ayland wrote:
>>> On 01/06/16 03:15, David Gibson wrote:
>>>
>>>> On Tue, May 31, 2016 at 11:28:49PM +0100, Mark Cave-Ayland wrote:
>>>>> On 31/05/16 01:41, David Gibson wrote:
>>>>>
>>>>>> From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>>>>>>
>>>>>> Not that anything remotely recent supports tlbia but ...
>>>>>>
>>>>>> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>>>>>> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
>>>>>> ---
>>>>>> target-ppc/translate.c | 6 +++---
>>>>>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>>>>>
>>>>>> diff --git a/target-ppc/translate.c b/target-ppc/translate.c
>>>>>> index dfd3010..690ffd2 100644
>>>>>> --- a/target-ppc/translate.c
>>>>>> +++ b/target-ppc/translate.c
>>>>>> @@ -4858,7 +4858,7 @@ static void gen_tlbie(DisasContext *ctx)
>>>>>> #if defined(CONFIG_USER_ONLY)
>>>>>> gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
>>>>>> #else
>>>>>> - if (unlikely(ctx->pr)) {
>>>>>> + if (unlikely(ctx->pr || !ctx->hv)) {
>>>>>> gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
>>>>>> return;
>>>>>> }
>>>>>> @@ -4879,7 +4879,7 @@ static void gen_tlbsync(DisasContext *ctx)
>>>>>> #if defined(CONFIG_USER_ONLY)
>>>>>> gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
>>>>>> #else
>>>>>> - if (unlikely(ctx->pr)) {
>>>>>> + if (unlikely(ctx->pr || !ctx->hv)) {
>>>>>> gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
>>>>>> return;
>>>>>> }
>>>>>> @@ -4898,7 +4898,7 @@ static void gen_slbia(DisasContext *ctx)
>>>>>> #if defined(CONFIG_USER_ONLY)
>>>>>> gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
>>>>>> #else
>>>>>> - if (unlikely(ctx->pr)) {
>>>>>> + if (unlikely(ctx->pr || !ctx->hv)) {
>>>>>> gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC);
>>>>>> return;
>>>>>> }
>>>>>
>>>>> Unfortunately this patch breaks qemu-system-ppc for both g3beige and
>>>>> mac99 under TCG causing a freeze in OpenBIOS when starting
>>>>> qemu-system-ppc with no parameters.
>>>>
>>>> Bother, sorry.
>>>>
>>>> I think this is because I applied this without the patch that treats
>>>> machines with no hypervisor mode (e.g. Apples) as always being in
>>>> hypervisor mode.
>>>
>>> No problem, I can cope for a couple of days or so.
>>
>> Cédric,
>>
>> Not sure if you've seen this thread, but one of the HV-mode patches
>> caused a regression on Mac. I think it's because I didn't include the
>> other patch which treats Apple-mode PPCs as always having HV=1.
>
> I missed that as I didn't put myself in Cc :/
>
>> Can you make sending your updated version of that patch a priority,
>> even if the rest of the batch of HV patches isn't ready yet.
>
> sure. I will/should today or tomorrow. I suppose we want these patches :
>
> [05/12] ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV
> http://patchwork.ozlabs.org/patch/618083/
>
> [07/12] ppc: Better figure out if processor has HV mode
> http://patchwork.ozlabs.org/patch/618089/
>
>
> Mark,
>
> I tried to boot a darwinppc-602.iso with :
>
> qemu-system-ppc -M g3beige -cdrom darwinx86-602.iso -boot d
>
> but I get a :
>
> "No valid state has been set by load or ..."
>
> or we don't need to go further ? may be I need a newer FW.
Hmmm that looks like you've got an x86 ISO there which is why
OpenBIOS/PPC fails to execute the bootloader. The image I use for
testing can be found here:
https://opensource.apple.com/static/iso/darwinppc-602.cdr.gz (simply
gunzip and then rename to .iso).
> Could you try the two patches above please ? They apply on top of Dave's
> ppc-for-2.7-20160531 and seem to have a good behavior with the small test
> I could do.
I'll try and take a look tomorrow, however in the meantime see if the
above image enables you to replicate the issue locally.
ATB,
Mark.
next prev parent reply other threads:[~2016-06-02 7:46 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-31 0:41 [Qemu-devel] [PULL 00/12] ppc-for-2.7 queue 20160531 David Gibson
2016-05-31 0:41 ` [Qemu-devel] [PULL 01/12] ppc: Remove MMU_MODEn_SUFFIX definitions David Gibson
2016-05-31 0:41 ` [Qemu-devel] [PULL 02/12] ppc: Use split I/D mmu modes to avoid flushes on interrupts David Gibson
2016-06-01 19:33 ` [Qemu-devel] [Qemu-ppc] " Mark Cave-Ayland
2016-06-02 3:15 ` David Gibson
2016-06-02 5:32 ` Mark Cave-Ayland
2016-05-31 0:41 ` [Qemu-devel] [PULL 03/12] ppc: Do some batching of TCG tlb flushes David Gibson
2016-05-31 0:41 ` [Qemu-devel] [PULL 04/12] ppc: tlbie, tlbia and tlbisync are HV only David Gibson
2016-05-31 22:28 ` [Qemu-devel] [Qemu-ppc] " Mark Cave-Ayland
2016-06-01 2:15 ` David Gibson
2016-06-01 7:03 ` Mark Cave-Ayland
2016-06-02 3:17 ` David Gibson
2016-06-02 7:37 ` Cédric Le Goater
2016-06-02 7:45 ` Mark Cave-Ayland [this message]
2016-06-02 8:23 ` Cédric Le Goater
2016-06-02 8:47 ` Mark Cave-Ayland
2016-06-02 18:09 ` Mark Cave-Ayland
2016-06-02 18:19 ` Cédric Le Goater
2016-06-03 7:12 ` David Gibson
2016-06-14 7:37 ` Thomas Huth
2016-05-31 0:41 ` [Qemu-devel] [PULL 05/12] ppc: Change 'invalid' bit mask of tlbiel and tlbie David Gibson
2016-05-31 0:41 ` [Qemu-devel] [PULL 06/12] ppc: Fix sign extension issue in mtmsr(d) emulation David Gibson
2016-05-31 0:41 ` [Qemu-devel] [PULL 07/12] ppc: Get out of emulation on SMT "OR" ops David Gibson
2025-08-27 14:07 ` Philippe Mathieu-Daudé
2025-09-24 17:19 ` Philippe Mathieu-Daudé
2016-05-31 0:41 ` [Qemu-devel] [PULL 08/12] ppc: Add PPC_64H instruction flag to POWER7 and POWER8 David Gibson
2016-05-31 0:41 ` [Qemu-devel] [PULL 09/12] exec: Remove cpu from cpus list during cpu_exec_exit() David Gibson
2016-05-31 0:41 ` [Qemu-devel] [PULL 10/12] exec: Do vmstate unregistration from cpu_exec_exit() David Gibson
2016-05-31 0:41 ` [Qemu-devel] [PULL 11/12] cpu: Reclaim vCPU objects David Gibson
2016-05-31 0:41 ` [Qemu-devel] [PULL 12/12] cpu: Add a sync version of cpu_remove() David Gibson
2016-06-02 12:42 ` [Qemu-devel] [PULL 00/12] ppc-for-2.7 queue 20160531 Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=574FE419.8080201@ilande.co.uk \
--to=mark.cave-ayland@ilande.co.uk \
--cc=bharata.rao@gmail.com \
--cc=clg@kaod.org \
--cc=david@gibson.dropbear.id.au \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.